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/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm64.c82 /* pin banks of exynos2200 pin-controller - ALIVE */
94 /* pin banks of exynos2200 pin-controller - CMGP */
121 /* pin banks of exynos2200 pin-controller - HSI1 */
126 /* pin banks of exynos2200 pin-controller - UFS */
131 /* pin banks of exynos2200 pin-controller - HSI1UFS */
136 /* pin banks of exynos2200 pin-controller - PERIC0 */
150 /* pin banks of exynos2200 pin-controller - PERIC1 */
158 /* pin banks of exynos2200 pin-controller - PERIC2 */
177 /* pin banks of exynos2200 pin-controller - VTS */
250 /* pin banks of exynos5433 pin-controller - ALIVE */
[all …]
H A Dpinctrl-exynos-arm.c103 /* pin banks of s5pv210 pin-controller */
105 /* Must start with EINTG banks, ordered by EINT group number. */
164 /* pin banks of exynos3250 pin-controller 0 */
166 /* Must start with EINTG banks, ordered by EINT group number. */
176 /* pin banks of exynos3250 pin-controller 1 */
178 /* Must start with EINTG banks, ordered by EINT group number. */
198 * PMU pad retention groups for Exynos3250 doesn't match pin banks, so handle
251 /* pin banks of exynos4210 pin-controller 0 */
253 /* Must start with EINTG banks, ordered by EINT group number. */
272 /* pin banks of exynos4210 pin-controller 1 */
[all …]
H A Dpinctrl-exynos.h56 * EINT filter configuration register (on alive banks) has
253 * @nr_banks: count of banks being part of the mux
254 * @banks: array of banks being part of the mux
258 struct samsung_pin_bank *banks[] __counted_by(nr_banks);
/linux/arch/arm/mach-omap2/
H A Dpowerdomains7xx_data.c37 .banks = 4,
78 .banks = 2,
92 .banks = 1,
105 .banks = 2,
119 .banks = 1,
132 .banks = 1,
144 .banks = 5,
170 .banks = 1,
186 .banks = 1,
201 .banks = 1,
[all …]
H A Dpowerdomains44xx_data.c38 .banks = 5,
63 .banks = 1,
81 .banks = 2,
101 .banks = 1,
119 .banks = 3,
140 .banks = 1,
157 .banks = 1,
174 .banks = 1,
190 .banks = 1,
207 .banks = 3,
[all …]
H A Dpowerdomains54xx_data.c36 .banks = 5,
62 .banks = 2,
91 .banks = 1,
109 .banks = 1,
126 .banks = 1,
142 .banks = 1,
159 .banks = 2,
188 .banks = 3,
209 .banks = 1,
227 .banks = 2,
[all …]
H A Dpowerdomains3xxx_data.c37 .banks = 4,
59 .banks = 1,
75 .banks = 1,
100 .banks = 2,
122 .banks = 2,
139 .banks = 2,
156 .banks = 1,
171 .banks = 1,
192 .banks = 1,
207 .banks = 1,
[all …]
H A Dpowerdomains2xxx_data.c31 .banks = 1,
46 .banks = 1,
61 .banks = 3,
87 .banks = 1,
H A Dpowerdomains43xx_data.c23 .banks = 1,
37 .banks = 3,
65 .banks = 1,
95 .banks = 4,
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Duncore-memory.json581 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
586 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
750 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
755 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 0 (Banks 0-3)",
760 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
765 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 1 (Banks 4-7)",
770 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
775 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 2 (Banks 8-11)",
780 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
785 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 3 (Banks 1
[all...]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Duncore-memory.json543 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
548 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
712 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
717 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 0 (Banks 0-3)",
722 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
727 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 1 (Banks 4-7)",
732 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
737 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 2 (Banks 8-11)",
742 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
747 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 3 (Banks 12-15)",
[all …]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Duncore-memory.json572 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
577 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
741 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
746 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 0 (Banks 0-3)",
751 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
756 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 1 (Banks 4-7)",
761 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
766 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 2 (Banks 8-11)",
771 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
776 "PublicDescription": "RD_CAS Access to Rank 0 : Bank Group 3 (Banks 12-15)",
[all …]
/linux/arch/powerpc/platforms/embedded6xx/
H A Dmpc10x.h107 #define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
108 #define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
109 #define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
110 #define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
112 #define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
113 #define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
114 #define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
115 #define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-ssbi-gpio.c326 u8 banks = 0; in pm8xxx_pin_config_set() local
336 banks |= BIT(2); in pm8xxx_pin_config_set()
338 banks |= BIT(3); in pm8xxx_pin_config_set()
342 banks |= BIT(2); in pm8xxx_pin_config_set()
344 banks |= BIT(3); in pm8xxx_pin_config_set()
355 banks |= BIT(2); in pm8xxx_pin_config_set()
357 banks |= BIT(3); in pm8xxx_pin_config_set()
361 banks |= BIT(3); in pm8xxx_pin_config_set()
365 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
370 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Duncore-memory.json643 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
812 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
822 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
832 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
842 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
852 "BriefDescription": "RD_CAS Access to Rank 1; All Banks",
1021 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 0 (Banks 0-3)",
1031 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 1 (Banks 4-7)",
1041 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 2 (Banks 8-11)",
1051 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 3 (Banks 12-15)",
[all …]
/linux/drivers/memory/
H A Dfsl_ifc.c42 * This function walks IFC banks comparing "Base address" field of the CSPR
54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
199 * resources for the NAND banks themselves are allocated
205 int version, banks; in fsl_ifc_ctrl_probe() local
235 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe()
236 dev_info(&dev->dev, "IFC version %d.%d, %d banks\n", in fsl_ifc_ctrl_probe()
237 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe()
240 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Duncore-memory.json1019 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
1188 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 0 (Banks 0-3)",
1198 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 1 (Banks 4-7)",
1208 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 2 (Banks 8-11)",
1218 "BriefDescription": "RD_CAS Access to Rank 0; Bank Group 3 (Banks 12-15)",
1228 "BriefDescription": "RD_CAS Access to Rank 1; All Banks",
1397 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 0 (Banks 0-3)",
1407 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 1 (Banks 4-7)",
1417 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 2 (Banks 8-11)",
1427 "BriefDescription": "RD_CAS Access to Rank 1; Bank Group 3 (Banks 12-15)",
[all …]
/linux/drivers/gpio/
H A Dgpio-bcm-kona.c67 struct bcm_kona_gpio_bank *banks; member
106 struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; in bcm_kona_gpio_lock_gpio()
129 struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; in bcm_kona_gpio_unlock_gpio()
595 dev_err(dev, "Couldn't determine # GPIO banks\n"); in bcm_kona_gpio_probe()
598 return dev_err_probe(dev, ret, "Couldn't determine GPIO banks\n"); in bcm_kona_gpio_probe()
603 dev_err(dev, "Too many GPIO banks configured (max=%d)\n", in bcm_kona_gpio_probe()
607 kona_gpio->banks = devm_kcalloc(dev, in bcm_kona_gpio_probe()
609 sizeof(*kona_gpio->banks), in bcm_kona_gpio_probe()
611 if (!kona_gpio->banks) in bcm_kona_gpio_probe()
633 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
[all …]
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_isr.c191 free_irq(irq, &etr_data->banks[i]); in adf_free_irqs()
212 /* Request msix irq for all banks unless SR-IOV enabled */ in adf_request_irqs()
215 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs()
303 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh()
305 (unsigned long)&priv_data->banks[i]); in adf_setup_bh()
316 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
317 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
H A Dadf_vf_isr.c168 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr()
207 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh()
208 (unsigned long)priv_data->banks); in adf_setup_bh()
216 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
217 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
H A Dadf_gen2_config.c16 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_crypto_dev_config() local
24 instances = min(cpus, banks); in adf_gen2_crypto_dev_config()
115 int banks = GET_MAX_BANKS(accel_dev); in adf_gen2_comp_dev_config() local
123 instances = min(cpus, banks); in adf_gen2_comp_dev_config()
/linux/drivers/clk/tegra/
H A Dclk.c213 static int tegra_clk_periph_ctx_init(int banks) in tegra_clk_periph_ctx_init() argument
215 periph_state_ctx = kcalloc(2 * banks, sizeof(*periph_state_ctx), in tegra_clk_periph_ctx_init()
223 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument
227 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init()
230 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init()
236 periph_banks = banks; in tegra_clk_init()
247 if (tegra_clk_periph_ctx_init(banks)) { in tegra_clk_init()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsamsung,pinctrl-gpio-bank.yaml31 For GPIO banks supporting external GPIO interrupts or external wake-up
37 For GPIO banks supporting external GPIO interrupts or external wake-up
42 For GPIO banks supporting direct external wake-up interrupts (without
/linux/Documentation/devicetree/bindings/gpio/
H A Dbrcm,kona-gpio.yaml11 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
35 GPIO banks on the SoC. The interrupts must be ordered by bank, starting
36 with bank 0. There is always a 1:1 mapping between banks and IRQs.
/linux/drivers/phy/mediatek/
H A DKconfig37 different banks layout, the T-PHY with shared banks between
39 so you can easily distinguish them by banks layout.

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