| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | qcom,bam-dma.yaml | 4 $id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml# 7 title: Qualcomm Technologies Inc BAM DMA controller 21 - qcom,bam-v1.3.0 23 - qcom,bam-v1.4.0 25 - qcom,bam-v1.7.0 29 - qcom,bam-v1.7.4 30 - const: qcom,bam-v1.7.0 54 Indicates supported number of DMA channels in a remotely controlled bam. 59 Indicates that the bam is controlled by remote processor i.e. execution 74 controlled bam. [all …]
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| /linux/include/linux/dma/ |
| H A D | qcom_bam_dma.h | 13 * supported by BAM DMA Engine. 38 * prep_bam_ce_le32 - Wrapper function to prepare a single BAM command 41 * @bam_ce: bam command element 43 * @cmd: BAM command 57 * bam_prep_ce - Wrapper function to prepare a single BAM command element 60 * @bam_ce: BAM command element 62 * @cmd: BAM command
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom,bam-dmux.yaml | 4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml# 7 title: Qualcomm BAM Data Multiplexer 13 The BAM Data Multiplexer provides access to the network data channels 16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control. 25 const: qcom,bam-dmux 79 bam-dmux { 80 compatible = "qcom,bam-dmux";
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| /linux/drivers/dma/qcom/ |
| H A D | bam_dma.c | 6 * QCOM BAM DMA engine driver 8 * QCOM BAM DMA blocks are distributed amongst a number of the on-chip 201 /* BAM CTRL */ 212 /* BAM REVISION */ 234 /* BAM NUM PIPES */ 242 /* BAM CNFG BITS */ 404 * bam_addr - returns BAM register address 405 * @bdev: bam device 421 * bam_reset() - reset and initialize BAM registers 422 * @bdev: bam device [all …]
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| H A D | Kconfig | 14 tristate "QCOM BAM DMA support" 19 Enable support for the QCOM BAM DMA controller. This controller
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| /linux/drivers/mmc/host/ |
| H A D | mmci_qcom_dml.c | 66 /* Set the Producer BAM block size */ in qcom_dma_start() 69 /* Set Producer BAM Transaction size */ in qcom_dma_start() 147 * want the BAM interface to connect with SDCC-DML. in qcom_dma_setup() 152 * BAM connected with DML should MASTER the AHB bus. in qcom_dma_setup() 164 * Initialize the logical BAM pipe size for producer in qcom_dma_setup()
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| /linux/drivers/net/wwan/ |
| H A D | Kconfig | 65 tristate "Qualcomm BAM-DMUX WWAN network driver" 68 The BAM Data Multiplexer provides access to the network data channels
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| /linux/tools/testing/selftests/bpf/prog_tests/ |
| H A D | linked_list.c | 763 id = btf__add_decl_tag(btf, "contains:bam:a", 9, 0); in test_btf() 764 if (!ASSERT_EQ(id, 10, "btf__add_decl_tag contains:bam:a")) in test_btf() 766 id = btf__add_struct(btf, "bam", 24); in test_btf() 767 if (!ASSERT_EQ(id, 11, "btf__add_struct bam")) in test_btf() 770 if (!ASSERT_OK(err, "btf__add_field bam::a")) in test_btf()
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| /linux/drivers/char/hw_random/ |
| H A D | intel-rng.c | 109 /* BAM, CAM, DBM, FBM, GxM 111 { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sda660-inforce-ifc6560.dts | 175 * BAM DMA interconnects support is in place. 188 * BAM DMA interconnects support is in place.
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| H A D | msm8917.dtsi | 1262 compatible = "qcom,bam-v1.7.0"; 1322 compatible = "qcom,bam-v1.7.0"; 1335 compatible = "qcom,bam-v1.7.0";
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| H A D | msm8976.dtsi | 1363 compatible = "qcom,bam-v1.7.0"; 1484 compatible = "qcom,bam-v1.7.0";
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| H A D | sdm630.dtsi | 1738 compatible = "qcom,bam-v1.7.0"; 1860 compatible = "qcom,bam-v1.7.0";
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| H A D | sm6115.dtsi | 861 compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
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| H A D | sdx75.dtsi | 884 compatible = "qcom,bam-v1.7.0";
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| /linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 1466 /* Free the initially allocated BAM transaction for reading the ONFI params */ in qcom_nand_attach_chip() 1473 /* Now allocate the BAM transaction based on updated max_cwperpage */ in qcom_nand_attach_chip() 1478 "failed to allocate bam transaction\n"); in qcom_nand_attach_chip() 2048 /* enable ADM or BAM DMA */ in qcom_nandc_setup() 2055 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup() 2056 * only if it is not in BAM mode. In most cases BAM in qcom_nandc_setup()
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8226.dtsi | 921 compatible = "qcom,bam-v1.4.0"; 975 bam_dmux: bam-dmux { 976 compatible = "qcom,bam-dmux";
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| H A D | qcom-msm8974.dtsi | 596 compatible = "qcom,bam-v1.4.0"; 1516 compatible = "qcom,bam-v1.4.0"; 1563 bam_dmux: bam-dmux { 1564 compatible = "qcom,bam-dmux";
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| H A D | qcom-sdx65.dtsi | 275 compatible = "qcom,bam-v1.7.0";
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| /linux/drivers/spi/ |
| H A D | spi-qpic-snand.c | 329 * Free the temporary BAM transaction allocated initially by in qcom_spi_ecc_init_ctx_pipelined() 339 dev_err(snandc->dev, "failed to allocate BAM transaction\n"); in qcom_spi_ecc_init_ctx_pipelined()
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| /linux/net/can/j1939/ |
| H A D | transport.c | 1752 netdev_info(priv->ndev, "%s: failed to create TP BAM session\n", in j1939_xtp_rx_rts() 2052 netdev_err_once(priv->ndev, "%s: BAM to unicast (%02x), ignoring!\n", in j1939_tp_cmd_recv()
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| /linux/arch/x86/pci/ |
| H A D | fixup.c | 151 * while they are obviously not. The 82801 family (AA, AB, BAM/CAM,
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 3811 /* Enable CL37 BAM */ in bnx2x_warpcore_enable_AN_KR() 3819 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_warpcore_enable_AN_KR() 5072 /* Enable TetonII and BAM autoneg */ in bnx2x_set_autoneg() 5078 /* Enable BAM aneg Mode and TetonII aneg Mode */ in bnx2x_set_autoneg() 5082 /* TetonII and BAM Autoneg Disabled */ in bnx2x_set_autoneg() 5098 /* Enable BAM Station Manager*/ in bnx2x_set_autoneg() 5233 /* Enable and restart BAM/CL37 aneg */ in bnx2x_restart_autoneg() 5500 * does support cl37 BAM. In this case we disable cl73 and in bnx2x_check_fallback_to_cl37() 7420 /* Enable CL37 BAM */ in bnx2x_8073_config_init() 7432 DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); in bnx2x_8073_config_init()
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| H A D | bnx2x_hsi.h | 640 /* Enable BAM on KR */
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| /linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | SA-1100.h | 1571 * [Bits LDM, BAM, and ERM are only implemented in
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