| /linux/drivers/iio/ |
| H A D | industrialio-backend.c | 72 struct iio_backend *back; member
82 #define iio_backend_check_op(back, op) ({ \ argument
83 struct iio_backend *____back = back; \
92 #define iio_backend_op_call(back, op, args...) ({ \ argument
93 struct iio_backend *__back = back; \
103 #define iio_backend_ptr_op_call(back, op, args...) ({ \ argument
104 struct iio_backend *__back = back; \
117 #define iio_backend_void_op_call(back, op, args...) { \ argument
118 struct iio_backend *__back = back; \
133 struct iio_backend *back = file->private_data; in iio_backend_debugfs_read_reg() local
[all …]
|
| /linux/include/linux/iio/ |
| H A D | backend.h | 122 int (*enable)(struct iio_backend *back);
123 void (*disable)(struct iio_backend *back);
124 int (*chan_enable)(struct iio_backend *back, unsigned int chan);
125 int (*chan_disable)(struct iio_backend *back, unsigned int chan);
126 int (*data_format_set)(struct iio_backend *back, unsigned int chan,
128 int (*data_source_set)(struct iio_backend *back, unsigned int chan,
130 int (*data_source_get)(struct iio_backend *back, unsigned int chan,
132 int (*set_sample_rate)(struct iio_backend *back, unsigned int chan,
134 int (*test_pattern_set)(struct iio_backend *back,
137 int (*chan_status)(struct iio_backend *back, unsigned int chan,
[all …]
|
| /linux/drivers/iio/dac/ |
| H A D | ad3552r-hs.c | 52 struct iio_backend *back; member
78 return st->data->bus_reg_read(st->back, reg, val, xfer_size); in ad3552r_hs_reg_read()
87 ret = iio_backend_data_source_set(st->back, i, type); in ad3552r_hs_set_data_source()
107 return st->data->bus_reg_write(st->back, reg, rval, xfer_size); in ad3552r_hs_update_reg_bits()
166 ret = st->data->bus_reg_write(st->back, in ad3552r_hs_write_raw()
186 return st->data->bus_set_io_mode(st->back, bus_mode); in ad3552r_hs_set_bus_io_mode_hs()
206 return st->data->bus_reg_write(st->back, in ad3552r_hs_set_target_io_mode_hs()
265 ret = st->data->bus_reg_write(st->back, in ad3552r_hs_buffer_postenable()
272 ret = st->data->bus_reg_write(st->back, in ad3552r_hs_buffer_postenable()
278 ret = iio_backend_ddr_enable(st->back); in ad3552r_hs_buffer_postenable()
[all …]
|
| H A D | adi-axi-dac.c | 121 static int axi_dac_enable(struct iio_backend *back) in axi_dac_enable() argument
123 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_enable()
148 static void axi_dac_disable(struct iio_backend *back) in axi_dac_disable() argument
150 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_disable()
156 static struct iio_buffer *axi_dac_request_buffer(struct iio_backend *back, in axi_dac_request_buffer() argument
159 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_request_buffer()
169 static void axi_dac_free_buffer(struct iio_backend *back, in axi_dac_free_buffer() argument
437 static int axi_dac_ext_info_set(struct iio_backend *back, uintptr_t private, in axi_dac_ext_info_set() argument
441 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_ext_info_set()
461 static int axi_dac_ext_info_get(struct iio_backend *back, uintptr_t private, in axi_dac_ext_info_get() argument
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/alderlake/ |
| H A D | frontend.json | 70 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
118 …d no uops for a period of at least 1 cycle which was not interrupted by a back-end stall. Availabl…
124 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
130 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
136 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
142 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
154 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
160 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
166 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
172 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | frontend.json | 55 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
99 …d no uops for a period of at least 1 cycle which was not interrupted by a back-end stall. Availabl…
104 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
110 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
115 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
121 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
132 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
137 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
143 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
148 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | frontend.json | 55 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
99 …d no uops for a period of at least 1 cycle which was not interrupted by a back-end stall. Availabl…
104 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
110 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
115 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
121 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
132 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
137 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
143 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
148 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | frontend.json | 69 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
122 …d no uops for a period of at least 1 cycle which was not interrupted by a back-end stall. Availabl…
127 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
133 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
138 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
144 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
155 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
160 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
166 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
171 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
[all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-bdi | 38 total write-back cache that relates to its current average
42 percentage of the write-back cache to a particular device.
52 total write-back cache that relates to its current average
56 of the write-back cache to a particular device. The value is
67 given percentage of the write-back cache. This is useful in
69 most of the write-back cache. For example in case of an NFS
80 given value of the write-back cache. The value is given as part
82 one device taking all or most of the write-back cache. For example
93 total write-back cache that relates to its current average
97 percentage of the write-back cache to a particular device
[all …]
|
| /linux/Documentation/driver-api/md/ |
| H A D | raid5-cache.rst | 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
30 tries to resync the array to bring it back to normal state. But before the
47 write-back mode
50 write-back mode fixes the 'write hole' issue too, since all write data is
51 cached on cache disk. But the main goal of 'write-back' cache is to speed up
56 overhead too. Write-back cache will aggregate the data and flush the data to
61 In write-back mode, MD reports IO completion to upper layer (usually
[all …]
|
| /linux/include/uapi/linux/media/raspberrypi/ |
| H A D | pisp_be_config.h | 3 * PiSP Back End configuration definitions.
112 * struct pisp_be_input_buffer_config - PiSP Back End input buffer
121 * struct pisp_be_dpc_config - PiSP Back End DPC config
139 * struct pisp_be_geq_config - PiSP Back End GEQ config
159 * struct pisp_be_tdn_input_buffer_config - PiSP Back End TDN input buffer
168 * struct pisp_be_tdn_config - PiSP Back End TDN config
191 * struct pisp_be_tdn_output_buffer_config - PiSP Back End TDN output buffer
200 * struct pisp_be_sdn_config - PiSP Back End SDN config
224 * struct pisp_be_stitch_input_buffer_config - PiSP Back End Stitch input
236 * struct pisp_be_stitch_config - PiSP Back En
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | frontend.json | 127 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
193 …d no uops for a period of at least 1 cycle which was not interrupted by a back-end stall. Availabl…
199 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
205 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
211 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
217 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
229 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
235 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
241 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
247 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | frontend.json | 58 "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
151 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | frontend.json | 58 "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
151 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | frontend.json | 58 "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
151 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | frontend.json | 58 "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
102 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 1 cycle which was not interrupted by a back-end stall.",
107 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
113 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
118 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
124 "PublicDescription": "Counts retired instructions that are delivered to the back-end after a front-end stall of at least 16 cycles. During this period the front-end delivered no uops.",
135 "PublicDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of at least 2 cycles which was not interrupted by a back-end stall.",
140 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
146 "PublicDescription": "Counts retired instructions that are fetched after an interval where the front-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
151 "BriefDescription": "Retired instructions that are fetched after an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back
[all...] |
| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_fltr.c | 61 struct ice_pf *pf = hw->back; in ice_fltr_set_vlan_vsi_promisc()
85 struct ice_pf *pf = hw->back; in ice_fltr_clear_vlan_vsi_promisc()
108 struct ice_pf *pf = hw->back; in ice_fltr_clear_vsi_promisc()
131 struct ice_pf *pf = hw->back; in ice_fltr_set_vsi_promisc()
150 return ice_add_mac(&vsi->back->hw, list); in ice_fltr_add_mac_list()
160 return ice_remove_mac(&vsi->back->hw, list); in ice_fltr_remove_mac_list()
170 return ice_add_vlan(&vsi->back->hw, list); in ice_fltr_add_vlan_list()
181 return ice_remove_vlan(&vsi->back->hw, list); in ice_fltr_remove_vlan_list()
191 return ice_add_eth_mac(&vsi->back->hw, list); in ice_fltr_add_eth_list()
201 return ice_remove_eth_mac(&vsi->back->hw, list); in ice_fltr_remove_eth_list()
[all …]
|
| H A D | ice_vsi_vlan_lib.c | 11 dev_err(ice_pf_to_dev(vsi->back), "%s %d specified invalid VLAN tpid 0x%04x\n", in print_invalid_tpid()
53 dev_err(ice_pf_to_dev(vsi->back), "Failure Adding VLAN %d on VSI %i, status %d\n", in ice_vsi_add_vlan()
66 struct ice_pf *pf = vsi->back; in ice_vsi_del_vlan()
93 struct ice_hw *hw = &vsi->back->hw; in ice_vsi_manage_vlan_insertion()
115 dev_err(ice_pf_to_dev(vsi->back), "update VSI for VLAN insert failed, err %d aq_err %s\n", in ice_vsi_manage_vlan_insertion()
133 struct ice_hw *hw = &vsi->back->hw; in ice_vsi_manage_vlan_stripping()
171 dev_err(ice_pf_to_dev(vsi->back), "update VSI for VLAN strip failed, ena = %d err %d aq_err %s\n", in ice_vsi_manage_vlan_stripping()
237 struct ice_hw *hw = &vsi->back->hw; in __ice_vsi_set_inner_port_vlan()
290 struct ice_hw *hw = &vsi->back->hw; in ice_vsi_clear_inner_port_vlan()
338 pf = vsi->back; in ice_cfg_vlan_pruning()
[all …]
|
| /linux/Documentation/fb/ |
| H A D | viafb.modes | 19 # Back Porch 1.907 us 1.048 ms
44 # Back Porch 3.810 us 0.427 ms
65 # Back Porch 2.222 us 0.578 ms
86 # Back Porch 2.409 us 0.475 ms
107 # Back Porch 1.984 us 0.496 ms
128 # Back Porch 3.274 us 0.462 ms
149 # Back Porch 3.245 us 435.949 us
170 # Back Porch 2.939 us 0.459 ms
191 # Back Porch 2.200 us 0.607 ms
213 # Back Porch 3.232 us 0.448 ms
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/pantherlake/ |
| H A D | frontend.json | 118 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
170 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
176 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
182 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
188 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
200 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
206 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
212 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
218 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
224 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
[all …]
|
| /linux/tools/testing/selftests/bpf/benchs/ |
| H A D | run_bench_ringbufs.sh | 19 header "Single-producer, back-to-back mode"
25 header "Ringbuf back-to-back, effect of sample rate"
29 header "Perfbuf back-to-back, effect of sample rate"
34 header "Ringbuf back-to-back, reserve+commit vs output"
|
| /linux/drivers/mmc/host/ |
| H A D | sdhci-bcm-kona.c | 43 struct mutex write_lock; /* protect back to back writes */
72 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_reset()
73 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_reset()
97 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS) in sdhci_bcm_kona_sd_init()
98 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_init()
119 * Back-to-Back register write needs a delay of min 10uS. in sdhci_bcm_kona_sd_card_emulate()
120 * Back-to-Back writes to same register needs delay when SD bus clock in sdhci_bcm_kona_sd_card_emulate()
|
| /linux/tools/perf/pmu-events/arch/x86/lunarlake/ |
| H A D | frontend.json | 172 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
232 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
238 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
244 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
250 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
262 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
268 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
274 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
280 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
286 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
[all …]
|
| /linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| H A D | hclge_mbx.c | 36 struct hclge_dev *hdev = vport->back; in hclge_gen_resp_to_vf()
95 struct hclge_dev *hdev = vport->back; in hclge_send_mbx_msg()
142 struct hclge_dev *hdev = vport->back; in hclge_inform_reset_assert_to_vf()
186 struct hclge_dev *hdev = vport->back; in hclge_get_ring_chain_from_mbx()
265 struct hclge_dev *hdev = vport->back; in hclge_query_ring_vector_map()
338 struct hclge_dev *hdev = vport->back; in hclge_set_vf_promisc_mode()
360 struct hclge_dev *hdev = vport->back; in hclge_set_vf_uc_mac_addr()
402 struct hclge_dev *hdev = vport->back; in hclge_set_vf_mc_mac_addr()
443 struct hclge_dev *hdev = vport->back; in hclge_set_vf_vlan_cfg()
494 struct hnae3_ae_dev *ae_dev = vport->back->ae_dev; in hclge_get_basic_info()
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/arrowlake/ |
| H A D | frontend.json | 182 …ecoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of …
260 …t-end delivered no uops for a period of 128 cycles which was not interrupted by a back-end stall.",
266 …livered no uops for a period of 128 cycles which was not interrupted by a back-end stall. Availabl…
272 …nt-end delivered no uops for a period of 16 cycles which was not interrupted by a back-end stall.",
278 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after a front…
290 … no uops for a period of at least 2 cycles which was not interrupted by a back-end stall. Availabl…
296 …t-end delivered no uops for a period of 256 cycles which was not interrupted by a back-end stall.",
302 …livered no uops for a period of 256 cycles which was not interrupted by a back-end stall. Availabl…
308 …ad at least 1 bubble-slot for a period of 2 cycles which was not interrupted by a back-end stall.",
314 …"PublicDescription": "Counts retired instructions that are delivered to the back-end after the fro…
[all …]
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