1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices AXI ADC IP core 8 9maintainers: 10 - Michael Hennerich <michael.hennerich@analog.com> 11 12description: | 13 Analog Devices Generic AXI ADC IP core for interfacing an ADC device 14 with a high speed serial (JESD204B/C) or source synchronous parallel 15 interface (LVDS/CMOS). 16 Usually, some other interface type (i.e SPI) is used as a control 17 interface for the actual ADC, while this IP core will interface 18 to the data-lines of the ADC and handle the streaming of data into 19 memory via DMA. 20 In some cases, the AXI ADC interface is used to perform specialized 21 operation to a particular ADC, e.g access the physical bus through 22 specific registers to write ADC registers. 23 In this case, we use a different compatible which indicates the target 24 IP core's name. 25 The following IP is currently supported: 26 - AXI AD7606x: specialized version of the IP core for all the chips from 27 the ad7606 family. 28 29 https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 30 https://analogdevicesinc.github.io/hdl/library/axi_ad408x/index.html 31 https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html 32 http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html 33 34properties: 35 compatible: 36 enum: 37 - adi,axi-adc-10.0.a 38 - adi,axi-ad408x 39 - adi,axi-ad7606x 40 - adi,axi-ad485x 41 42 reg: 43 maxItems: 1 44 45 clocks: 46 maxItems: 1 47 48 dmas: 49 maxItems: 1 50 51 dma-names: 52 items: 53 - const: rx 54 55 adi,adc-dev: 56 $ref: /schemas/types.yaml#/definitions/phandle 57 description: 58 A reference to a the actual ADC to which this FPGA ADC interfaces to. 59 deprecated: true 60 61 '#io-backend-cells': 62 const: 0 63 64 '#address-cells': 65 const: 1 66 67 '#size-cells': 68 const: 0 69 70patternProperties: 71 "^adc@[0-9a-f]+$": 72 type: object 73 properties: 74 reg: 75 maxItems: 1 76 additionalProperties: true 77 required: 78 - compatible 79 - reg 80 81required: 82 - compatible 83 - dmas 84 - reg 85 - clocks 86 87allOf: 88 - if: 89 properties: 90 compatible: 91 not: 92 contains: 93 const: adi,axi-ad7606x 94 then: 95 properties: 96 '#address-cells': false 97 '#size-cells': false 98 patternProperties: 99 "^adc@[0-9a-f]+$": false 100 101additionalProperties: false 102 103examples: 104 - | 105 adc@44a00000 { 106 compatible = "adi,axi-adc-10.0.a"; 107 reg = <0x44a00000 0x10000>; 108 dmas = <&rx_dma 0>; 109 dma-names = "rx"; 110 clocks = <&axi_clk>; 111 #io-backend-cells = <0>; 112 }; 113 - | 114 #include <dt-bindings/gpio/gpio.h> 115 parallel_bus_controller@44a00000 { 116 compatible = "adi,axi-ad7606x"; 117 reg = <0x44a00000 0x10000>; 118 dmas = <&rx_dma 0>; 119 dma-names = "rx"; 120 clocks = <&ext_clk>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 124 adc@0 { 125 compatible = "adi,ad7606b"; 126 reg = <0>; 127 pwms = <&axi_pwm_gen 0 0>; 128 pwm-names = "convst1"; 129 avcc-supply = <&adc_vref>; 130 vdrive-supply = <&vdd_supply>; 131 reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>; 132 standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>; 133 adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>; 134 adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH 135 &gpio0 87 GPIO_ACTIVE_HIGH 136 &gpio0 86 GPIO_ACTIVE_HIGH>; 137 io-backends = <¶llel_bus_controller>; 138 }; 139 }; 140... 141