| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/ |
| H A D | base.c | 25 #include "aux.h"
26 #include "bus.h"
39 list_for_each_entry(pad, &i2c->pad, head) { in nvkm_i2c_pad_find()
40 if (pad->id == id) in nvkm_i2c_pad_find()
50 struct nvkm_bios *bios = i2c->subdev.device->bios; in nvkm_i2c_bus_find()
51 struct nvkm_i2c_bus *bus; in nvkm_i2c_bus_find() local
67 list_for_each_entry(bus, &i2c->bus, head) { in nvkm_i2c_bus_find()
68 if (bus->id == id) in nvkm_i2c_bus_find()
69 return bus; in nvkm_i2c_bus_find()
78 struct nvkm_i2c_aux *aux; in nvkm_i2c_aux_find() local
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| H A D | anx9805.c | 27 #include "aux.h"
28 #include "bus.h"
32 struct nvkm_i2c_bus *bus; member
45 struct anx9805_bus *bus = anx9805_bus(base); in anx9805_bus_xfer() local
46 struct anx9805_pad *pad = bus->pad; in anx9805_bus_xfer()
47 struct i2c_adapter *adap = &pad->bus->i2c; in anx9805_bus_xfer()
49 int ret = -ETIMEDOUT; in anx9805_bus_xfer()
53 tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x10; in anx9805_bus_xfer()
54 nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x10); in anx9805_bus_xfer()
55 nvkm_wri2cr(adap, pad->addr, 0x07, tmp); in anx9805_bus_xfer()
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_dp_aux_bus.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * The DP AUX bus is used for devices that are connected over a DisplayPort
6 * AUX bus. The device on the far side of the bus is referred to as an
9 * There is only one device connected to the DP AUX bus: an eDP panel.
11 * platform devices, putting them under the DP AUX bus allows the panel driver
12 * to perform transactions on that bus.
27 int (*done_probing)(struct drm_dp_aux *aux);
31 * dp_aux_ep_match() - The match function for the dp_aux_bus.
41 return !!of_match_device(drv->of_match_table, dev); in dp_aux_ep_match()
45 * dp_aux_ep_probe() - The probe function for the dp_aux_bus.
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| H A D | drm_dp_dual_mode_helper.c | 40 * Adaptor registers (if any) and the sink DDC bus may be accessed via I2C.
43 * Adaptor registers and sink DDC bus can be accessed either via I2C or
44 * I2C-over-AUX. Source devices may choose to implement either of these
51 * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s)
52 * @adapter: I2C adapter for the DDC bus
69 * As sub-addressing is not supported by all adaptors, in drm_dp_dual_mode_read()
94 return -ENOMEM; in drm_dp_dual_mode_read()
108 return -EPROTO; in drm_dp_dual_mode_read()
115 * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s)
116 * @adapter: I2C adapter for the DDC bus
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| /linux/Documentation/devicetree/bindings/display/ |
| H A D | dp-aux-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
17 a standard I2C DDC connection over the AUX channel.
20 of the DP controller under the "aux-bus" node.
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| /linux/include/drm/display/ |
| H A D | drm_dp_aux_bus.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * The DP AUX bus is used for devices that are connected over a DisplayPort
6 * AUX bus. The devices on the far side of the bus are referred to as
17 * struct dp_aux_ep_device - Main dev structure for DP AUX endpoints
19 * This is used to instantiate devices that are connected via a DP AUX
20 * bus. Usually the device is a panel, but conceivable other devices could
26 /** @aux: Pointer to the aux bus */
27 struct drm_dp_aux *aux; member
47 int of_dp_aux_populate_bus(struct drm_dp_aux *aux,
48 int (*done_probing)(struct drm_dp_aux *aux));
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| /linux/Documentation/devicetree/bindings/display/tegra/ |
| H A D | nvidia,tegra124-dpaux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 When configured for DisplayPort AUX operation, the DPAUX controller
20 AUX channel.
24 pattern: "^dpaux@[0-9a-f]+$"
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| /linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | panel-edp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
21 represented under the DP AUX bus. This means that we can use any
22 information provided by the DP AUX bus (including the EDID) to identify
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | dp-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
19 - enum:
20 - qcom,sc7180-dp
21 - qcom,sc7280-dp
22 - qcom,sc7280-edp
23 - qcom,sc8180x-dp
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq6018
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| H A D | hisilicon-histb-pcie.txt | 6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
22 DWC PCIe CSR space is normally accessed over the dedicated Data Bus
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
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| H A D | qcom,pcie-sm8250.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sm8250
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
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| H A D | toshiba,visconti-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
16 - $ref: /schemas/pci/snps,dw-pcie.yaml#
20 const: toshiba,visconti-pcie
24 - description: Data Bus Interface (DBI) registers.
25 - description: PCIe configuration space region.
26 - description: Visconti specific additional registers.
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | ps8640.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
39 vdd33-supply:
42 aux-bus:
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| H A D | analogix,anx7625.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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| H A D | ti,sn65dsi86.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | brcm,bcm2835-aux-spi.txt | 8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
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| /linux/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_dp.c | 34 MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream (default: enabled)");
42 return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc); in nouveau_dp_has_sink_count()
51 ret = nvif_outp_dp_aux_xfer(&outp->outp, DP_AUX_NATIVE_READ, &size, in nouveau_dp_probe_lttpr()
64 struct drm_connector *connector = &nv_connector->base; in nouveau_dp_probe_dpcd()
65 struct drm_dp_aux *aux = &nv_connector->aux; in nouveau_dp_probe_dpcd() local
69 u8 *dpcd = outp->dp.dpcd; in nouveau_dp_probe_dpcd()
71 outp->dp.lttpr.nr = 0; in nouveau_dp_probe_dpcd()
72 outp->dp.rate_nr = 0; in nouveau_dp_probe_dpcd()
73 outp->dp.link_nr = 0; in nouveau_dp_probe_dpcd()
74 outp->dp.link_bw = 0; in nouveau_dp_probe_dpcd()
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| /linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| H A D | i2c.h | 1 /* SPDX-License-Identifier: MIT */
20 #define NVKM_I2C_BUS_PRI /* ccb primary comm. port */ -1
21 #define NVKM_I2C_BUS_SEC /* ccb secondary comm. port */ -2
65 struct list_head bus; member
66 struct list_head aux; member
100 return -EIO; in nvkm_rdi2cr()
116 return -EIO; in nv_rd16i2cr()
131 return -EIO; in nvkm_wri2cr()
146 return -EIO; in nv_wr16i2cr()
158 nvkm_rdaux(struct nvkm_i2c_aux *aux, u32 addr, u8 *data, u8 size) in nvkm_rdaux() argument
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| /linux/drivers/gpu/drm/bridge/ |
| H A D | parade-ps8640.c | 1 // SPDX-License-Identifier: GPL-2.0-only
100 struct drm_dp_aux aux; member
153 static inline struct ps8640 *aux_to_ps8640(struct drm_dp_aux *aux) in aux_to_ps8640() argument
155 return container_of(aux, struct ps8640, aux); in aux_to_ps8640()
160 struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; in _ps8640_wait_hpd_asserted()
181 if (!ret && ps_bridge->need_post_hpd_delay) { in _ps8640_wait_hpd_asserted()
182 ps_bridge->need_post_hpd_delay = false; in _ps8640_wait_hpd_asserted()
189 static int ps8640_wait_hpd_asserted(struct drm_dp_aux *aux, unsigned long wait_us) in ps8640_wait_hpd_asserted() argument
191 struct ps8640 *ps_bridge = aux_to_ps8640(aux); in ps8640_wait_hpd_asserted()
192 struct device *dev = &ps_bridge->page[PAGE0_DP_CNTL]->dev; in ps8640_wait_hpd_asserted()
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| H A D | ti-sn65dsi86.c | 1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
142 * @aux: Our aux channel.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
154 * @comms_enabled: If true then communication over the aux channel is enabled.
159 * serves double-duty of keeping track of the direction and
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| /linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | anx7625.c | 1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <media/v4l2-fwnode.h>
36 #include <sound/hdmi-codec.h>
50 struct device *dev = &client->dev; in i2c_access_workaround()
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
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| /linux/tools/perf/Documentation/ |
| H A D | perf-record.txt | 1 perf-record(1)
5 ----
6 perf-record - Run a command and record its profile into perf.data
9 --------
11 'perf record' [-e <EVENT> | --event=EVENT] [-a] <command>
12 'perf record' [-e <EVENT> | --event=EVENT] [-a] \-- <command> [<options>]
15 -----------
17 from it, into perf.data - without displaying anything.
23 -------
27 -e::
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| /linux/drivers/pci/controller/dwc/ |
| H A D | pcie-histb.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 HiSilicon Co., Ltd. http://www.hisilicon.com
24 #include "pcie-designware.h"
26 #define to_histb_pcie(x) dev_get_drvdata((x)->dev)
69 return readl(histb_pcie->ctrl + reg); in histb_pcie_readl()
74 writel(val, histb_pcie->ctrl + reg); in histb_pcie_writel()
110 histb_pcie_dbi_r_mode(&pci->pp, true); in histb_pcie_read_dbi()
112 histb_pcie_dbi_r_mode(&pci->pp, false); in histb_pcie_read_dbi()
120 histb_pcie_dbi_w_mode(&pci->pp, true); in histb_pcie_write_dbi()
122 histb_pcie_dbi_w_mode(&pci->pp, false); in histb_pcie_write_dbi()
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