Lines Matching +full:aux +full:- +full:bus
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq6018
25 - qcom,pcie-ipq8064
26 - qcom,pcie-ipq8064-v2
27 - qcom,pcie-ipq8074
28 - qcom,pcie-ipq8074-gen3
29 - qcom,pcie-msm8996
30 - qcom,pcie-qcs404
31 - qcom,pcie-sdm845
32 - qcom,pcie-sdx55
33 - items:
34 - const: qcom,pcie-msm8998
35 - const: qcom,pcie-msm8996
41 reg-names:
49 interrupt-names:
53 iommu-map:
57 # Common definitions for clocks, clock-names and reset.
63 clock-names:
67 dma-coherent: true
72 interconnect-names:
74 - const: pcie-mem
75 - const: cpu-pcie
81 reset-names:
85 vdda-supply:
88 vdda_phy-supply:
91 vdda_refclk-supply:
94 vddpe-3v3-supply:
100 phy-names:
102 - const: pciephy
104 power-domains:
107 perst-gpios:
111 required-opps:
114 wake-gpios:
119 - compatible
120 - reg
121 - reg-names
122 - interrupt-map-mask
123 - interrupt-map
124 - clocks
125 - clock-names
128 - required:
129 - interrupts
130 - interrupt-names
131 - "#interrupt-cells"
132 - required:
133 - msi-map
136 - $ref: /schemas/pci/pci-host-bridge.yaml#
137 - if:
142 - qcom,pcie-apq8064
143 - qcom,pcie-ipq4019
144 - qcom,pcie-ipq8064
145 - qcom,pcie-ipq8064v2
146 - qcom,pcie-ipq8074
147 - qcom,pcie-qcs404
153 reg-names:
155 - const: dbi # DesignWare PCIe registers
156 - const: elbi # External local bus interface registers
157 - const: parf # Qualcomm specific registers
158 - const: config # PCIe configuration space
160 - if:
165 - qcom,pcie-ipq6018
166 - qcom,pcie-ipq8074-gen3
172 reg-names:
174 - const: dbi # DesignWare PCIe registers
175 - const: elbi # External local bus interface registers
176 - const: atu # ATU address space
177 - const: parf # Qualcomm specific registers
178 - const: config # PCIe configuration space
180 - if:
185 - qcom,pcie-apq8084
186 - qcom,pcie-msm8996
187 - qcom,pcie-sdm845
193 reg-names:
196 - const: parf # Qualcomm specific registers
197 - const: dbi # DesignWare PCIe registers
198 - const: elbi # External local bus interface registers
199 - const: config # PCIe configuration space
200 - const: mhi # MHI registers
202 - if:
207 - qcom,pcie-sdx55
213 reg-names:
216 - const: parf # Qualcomm specific registers
217 - const: dbi # DesignWare PCIe registers
218 - const: elbi # External local bus interface registers
219 - const: atu # ATU address space
220 - const: config # PCIe configuration space
221 - const: mhi # MHI registers
223 - if:
228 - qcom,pcie-apq8064
229 - qcom,pcie-ipq8064
230 - qcom,pcie-ipq8064v2
236 clock-names:
239 - const: core # Clocks the pcie hw block
240 - const: iface # Configuration AHB clock
241 - const: phy # Clocks the pcie PHY block
242 - const: aux # Clocks the pcie AUX block, not on apq8064
243 - const: ref # Clocks the pcie ref block, not on apq8064
247 reset-names:
250 - const: axi # AXI reset
251 - const: ahb # AHB reset
252 - const: por # POR reset
253 - const: pci # PCI reset
254 - const: phy # PHY reset
255 - const: ext # EXT reset, not on apq8064
257 - vdda-supply
258 - vdda_phy-supply
259 - vdda_refclk-supply
261 - if:
266 - qcom,pcie-apq8084
272 clock-names:
274 - const: iface # Configuration AHB clock
275 - const: master_bus # Master AXI clock
276 - const: slave_bus # Slave AXI clock
277 - const: aux # Auxiliary (AUX) clock
280 reset-names:
282 - const: core # Core reset
284 - if:
289 - qcom,pcie-ipq4019
295 clock-names:
297 - const: aux # Auxiliary (AUX) clock
298 - const: master_bus # Master AXI clock
299 - const: slave_bus # Slave AXI clock
303 reset-names:
305 - const: axi_m # AXI master reset
306 - const: axi_s # AXI slave reset
307 - const: pipe # PIPE reset
308 - const: axi_m_vmid # VMID reset
309 - const: axi_s_xpu # XPU reset
310 - const: parf # PARF reset
311 - const: phy # PHY reset
312 - const: axi_m_sticky # AXI sticky reset
313 - const: pipe_sticky # PIPE sticky reset
314 - const: pwr # PWR reset
315 - const: ahb # AHB reset
316 - const: phy_ahb # PHY AHB reset
318 - if:
323 - qcom,pcie-msm8996
329 clock-names:
331 - const: pipe # Pipe Clock driving internal logic
332 - const: aux # Auxiliary (AUX) clock
333 - const: cfg # Configuration clock
334 - const: bus_master # Master AXI clock
335 - const: bus_slave # Slave AXI clock
337 reset-names: false
339 - if:
344 - qcom,pcie-ipq8074
350 clock-names:
352 - const: iface # PCIe to SysNOC BIU clock
353 - const: axi_m # AXI Master clock
354 - const: axi_s # AXI Slave clock
355 - const: ahb # AHB clock
356 - const: aux # Auxiliary clock
360 reset-names:
362 - const: pipe # PIPE reset
363 - const: sleep # Sleep reset
364 - const: sticky # Core Sticky reset
365 - const: axi_m # AXI Master reset
366 - const: axi_s # AXI Slave reset
367 - const: ahb # AHB Reset
368 - const: axi_m_sticky # AXI Master Sticky reset
370 - if:
375 - qcom,pcie-ipq6018
376 - qcom,pcie-ipq8074-gen3
382 clock-names:
384 - const: iface # PCIe to SysNOC BIU clock
385 - const: axi_m # AXI Master clock
386 - const: axi_s # AXI Slave clock
387 - const: axi_bridge # AXI bridge clock
388 - const: rchng
392 reset-names:
394 - const: pipe # PIPE reset
395 - const: sleep # Sleep reset
396 - const: sticky # Core Sticky reset
397 - const: axi_m # AXI Master reset
398 - const: axi_s # AXI Slave reset
399 - const: ahb # AHB Reset
400 - const: axi_m_sticky # AXI Master Sticky reset
401 - const: axi_s_sticky # AXI Slave Sticky reset
403 - if:
408 - qcom,pcie-qcs404
414 clock-names:
416 - const: iface # AHB clock
417 - const: aux # Auxiliary clock
418 - const: master_bus # AXI Master clock
419 - const: slave_bus # AXI Slave clock
423 reset-names:
425 - const: axi_m # AXI Master reset
426 - const: axi_s # AXI Slave reset
427 - const: axi_m_sticky # AXI Master Sticky reset
428 - const: pipe_sticky # PIPE sticky reset
429 - const: pwr # PWR reset
430 - const: ahb # AHB reset
432 - if:
437 - qcom,pcie-sdm845
441 - properties:
445 clock-names:
447 - const: pipe # PIPE clock
448 - const: aux # Auxiliary clock
449 - const: cfg # Configuration clock
450 - const: bus_master # Master AXI clock
451 - const: bus_slave # Slave AXI clock
452 - const: slave_q2a # Slave Q2A clock
453 - const: ref # REFERENCE clock
454 - const: tbu # PCIe TBU clock
455 - properties:
459 clock-names:
461 - const: pipe # PIPE clock
462 - const: aux # Auxiliary clock
463 - const: cfg # Configuration clock
464 - const: bus_master # Master AXI clock
465 - const: bus_slave # Slave AXI clock
466 - const: slave_q2a # Slave Q2A clock
467 - const: tbu # PCIe TBU clock
471 reset-names:
473 - const: pci # PCIe core reset
475 - if:
480 - qcom,pcie-sdx55
486 clock-names:
488 - const: pipe # PIPE clock
489 - const: aux # Auxiliary clock
490 - const: cfg # Configuration clock
491 - const: bus_master # Master AXI clock
492 - const: bus_slave # Slave AXI clock
493 - const: slave_q2a # Slave Q2A clock
494 - const: sleep # PCIe Sleep clock
497 reset-names:
499 - const: pci # PCIe core reset
501 - if:
507 - qcom,pcie-apq8064
508 - qcom,pcie-ipq4019
509 - qcom,pcie-ipq8064
510 - qcom,pcie-ipq8064v2
511 - qcom,pcie-ipq8074
512 - qcom,pcie-ipq8074-gen3
513 - qcom,pcie-qcs404
516 - power-domains
518 - if:
524 - qcom,pcie-msm8996
527 - resets
528 - reset-names
530 - if:
535 - qcom,pcie-msm8996
536 - qcom,pcie-sdm845
539 - properties:
542 interrupt-names:
544 - const: msi
545 - properties:
548 interrupt-names:
550 - const: msi0
551 - const: msi1
552 - const: msi2
553 - const: msi3
554 - const: msi4
555 - const: msi5
556 - const: msi6
557 - const: msi7
559 - if:
564 - qcom,pcie-apq8064
565 - qcom,pcie-apq8084
566 - qcom,pcie-ipq4019
567 - qcom,pcie-ipq6018
568 - qcom,pcie-ipq8064
569 - qcom,pcie-ipq8064-v2
570 - qcom,pcie-ipq8074
571 - qcom,pcie-ipq8074-gen3
572 - qcom,pcie-qcs404
577 interrupt-names:
579 - const: msi
584 - |
585 #include <dt-bindings/interrupt-controller/arm-gic.h>
587 compatible = "qcom,pcie-ipq8064";
592 reg-names = "dbi", "elbi", "parf", "config";
594 linux,pci-domain = <0>;
595 bus-range = <0x00 0xff>;
596 num-lanes = <1>;
597 #address-cells = <3>;
598 #size-cells = <2>;
602 interrupt-names = "msi";
603 #interrupt-cells = <1>;
604 interrupt-map-mask = <0 0 0 0x7>;
605 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
614 clock-names = "core", "iface", "phy", "aux", "ref";
621 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
622 pinctrl-0 = <&pcie_pins_default>;
623 pinctrl-names = "default";
624 vdda-supply = <&pm8921_s3>;
625 vdda_phy-supply = <&pm8921_lvs6>;
626 vdda_refclk-supply = <&ext_3p3v>;
628 - |
629 #include <dt-bindings/interrupt-controller/arm-gic.h>
630 #include <dt-bindings/gpio/gpio.h>
632 compatible = "qcom,pcie-apq8084";
637 reg-names = "parf", "dbi", "elbi", "config";
639 linux,pci-domain = <0>;
640 bus-range = <0x00 0xff>;
641 num-lanes = <1>;
642 #address-cells = <3>;
643 #size-cells = <2>;
647 interrupt-names = "msi";
648 #interrupt-cells = <1>;
649 interrupt-map-mask = <0 0 0 0x7>;
650 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
658 clock-names = "iface", "master_bus", "slave_bus", "aux";
660 reset-names = "core";
661 power-domains = <&gcc 1>;
662 vdda-supply = <&pma8084_l3>;
664 phy-names = "pciephy";
665 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
666 pinctrl-0 = <&pcie0_pins_default>;
667 pinctrl-names = "default";