| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | pl011.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
22 - arm,pl011
24 - compatible
29 - const: arm,pl011
30 - const: arm,primecell
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| /linux/drivers/net/ethernet/intel/igc/ |
| H A D | igc_phy.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
26 * igc_get_phy_id - Retrieve the PHY ID and revision
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
44 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
48 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
49 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
56 * igc_phy_has_link - Polls PHY for link
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| H A D | igc_base.c | 1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
47 /* When auto config read does not complete, do not in igc_reset_hw_base()
51 hw_dbg("Auto Read Done did not complete\n"); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
73 /* Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_base()
84 nvm->type = igc_nvm_eeprom_spi; in igc_init_nvm_params_base()
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| /linux/Documentation/hid/ |
| H A D | hid-sensor.rst | 26 Logical Minimum(-32767)
35 The report is indicating "sensor page (0x20)" contains an accelerometer-3D (0x73).
36 This accelerometer-3D has some fields. Here for example field 2 is motion intensity
37 (0x045f) with a logical minimum value of -32767 and logical maximum of 32767. The
51 - Core HID driver
52 - Individual sensor processing part (sensor drivers)
55 -----------
56 The core driver (hid-sensor-hub) registers as a HID driver. It parses
58 with name HID-SENSOR-xxxx (where xxxx is usage id from the specification).
62 HID-SENSOR-200073 is registered for an Accelerometer 3D driver.
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| /linux/Documentation/userspace-api/netlink/ |
| H A D | intro-specs.rst | 1 .. SPDX-License-Identifier: BSD-3-Clause
21 - ``--spec`` - point to the spec file
22 - ``--do $name`` / ``--dump $name`` - issue request ``$name``
23 - ``--json $attrs`` - provide attributes for the request
24 - ``--subscribe $group`` - receive notifications from ``$group``
30 $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/ethtool.yaml \
31 --do rings-get \
32 --json '{"header":{"dev-index": 18}}'
33 {'header': {'dev-index': 18, 'dev-name': 'eni1np1'},
35 'rx-jumbo': 0,
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| /linux/Documentation/misc-devices/ |
| H A D | xilinx_sdfec.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
4 Xilinx SD-FEC Driver
10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.
15 …f SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.xilinx.com/cgi-bin/docs…
19 - Retrieval of the Integrated Block configuration and status information
20 - Configuration of LDPC codes
21 - Configuration of Turbo decoding
22 - Monitoring errors
24 Missing features, known issues, and limitations of the SD-FEC driver are as
27 - Only allows a single open file handler to any instance of the driver at any time
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| /linux/include/linux/ |
| H A D | hil.h | 5 * Hewlett Packard Human Interface Loop (HP-HIL) Protocol -- header.
33 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
57 * implementing a software MLC to run HIL devices on a non-parisc machine.
109 HIL_ERR_OB = 0x00000800, /* MLC is busy sending an auto-poll,
114 HIL_ERR_LERR = 0x00040000, /* A poll didn't come back. */
131 /* This gives us a 32-bit "packet"
140 HIL_CMD_EPT = 0x01, /* Enter Pass-Thru Mode */
141 HIL_CMD_ELB = 0x02, /* Enter Loop-Back Mode */
147 HIL_CMD_ACF = 0x08, /* Auto Configure */
148 HIL_CMDID_ACF = 0x07, /* Auto Configure bits with incremented ID */
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| /linux/include/sound/ |
| H A D | timer.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Abramo Bagnara <abramo@alsa-project.org>
14 #define snd_timer_chip(timer) ((timer)->private_data)
20 #define SNDRV_TIMER_HW_AUTO 0x00000001 /* auto trigger is supported */
29 #define SNDRV_TIMER_IFLG_AUTO 0x00000008 /* auto restart */
32 #define SNDRV_TIMER_IFLG_EXCLUSIVE 0x00000040 /* exclusive owner - no more instances */
33 #define SNDRV_TIMER_IFLG_EARLY_EVENT 0x00000080 /* write early event to the poll queue */
41 /* -- must be filled with low-level driver */
47 /* -- low-level functions -- */
96 unsigned long ticks; /* auto-load ticks when expired */
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| /linux/drivers/net/ethernet/intel/e1000e/ |
| H A D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * e1000e_get_bus_info_pcie - Get PCIe bus information
18 struct pci_dev *pdev = hw->adapter->pdev; in e1000e_get_bus_info_pcie()
19 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
20 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
24 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
27 bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, in e1000e_get_bus_info_pcie()
31 mac->ops.set_lan_id(hw); in e1000e_get_bus_info_pcie()
37 * e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
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| /linux/drivers/net/ethernet/intel/igb/ |
| H A D | e1000_phy.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
31 * igb_check_reset_block - Check if PHY reset is blocked
48 * igb_get_phy_id - Retrieve the PHY ID and revision
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
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| /linux/drivers/net/ethernet/sun/ |
| H A D | sungem.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
39 * This auto-clearing does not occur when the alias at GREG_STAT2
69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level
98 * The driver _MUST_ poll these bits until they clear. One may not attempt
130 * This 13-bit register is programmed by the driver to hold the descriptor
136 * This 13-bit register is updated by GEM to hold to descriptor entry index
171 * them later. -DaveM
220 #define RXDMA_CFG_RINGSZ_32 0x00000000 /* - 32 entries */
221 #define RXDMA_CFG_RINGSZ_64 0x00000002 /* - 64 entries */
222 #define RXDMA_CFG_RINGSZ_128 0x00000004 /* - 128 entries */
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| H A D | sunhme.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 #define GREG_STAT_ACNTEXP 0x00000004 /* Align-error counter expired */
39 #define GREG_STAT_CCNTEXP 0x00000008 /* CRC-error counter expired */
40 #define GREG_STAT_LCNTEXP 0x00000010 /* Length-error counter expired */
42 #define GREG_STAT_CVCNTEXP 0x00000040 /* Code-violation counter expired */
46 #define GREG_STAT_MAXPKTERR 0x00000400 /* Max-packet size error */
47 #define GREG_STAT_NCNTEXP 0x00000800 /* Normal-collision counter expired */
48 #define GREG_STAT_ECNTEXP 0x00001000 /* Excess-collision counter expired */
49 #define GREG_STAT_LCCNTEXP 0x00002000 /* Late-collision counter expired */
50 #define GREG_STAT_FCNTEXP 0x00004000 /* First-collision counter expired */
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| /linux/drivers/net/ethernet/apple/ |
| H A D | mace.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mace.h - definitions for the registers in the Am79C940 MACE
22 REG(pr); /* poll register */
49 #define AUTO_PAD_XMIT 0x01 /* auto-pad short packets on transmission */
53 #define UFLO 0x40 /* underflow - xmit fifo ran dry */
63 #define RETRY_MASK 0x0f /* number of retries (0 - 15) */
68 #define AUTO_STRIP_RCV 0x01 /* auto-strip short LLC frames on recv */
94 #define JABBER 0x80 /* jabber error - 10baseT xmission too long */
95 #define BABBLE 0x40 /* babble - xmitter xmitting for too long */
96 #define CERR 0x20 /* collision err - no SQE test (heartbeat) */
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| /linux/drivers/usb/host/ |
| H A D | uhci-hub.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
19 USB_DT_HUB, /* __u8 bDescriptorType; Hub-descriptor */
22 HUB_CHAR_INDV_PORT_OCPM, /* (per-port OC, no power switching) */
41 /* A port that either is connected or has a changed-bit set will prevent
48 for (port = 0; port < uhci->rh_numports; ++port) { in any_ports_active()
51 test_bit(port, &uhci->port_c_suspend)) in any_ports_active()
72 for (port = 0; port < uhci->rh_numports; ++port) { in get_hub_status_data()
74 test_bit(port, &uhci->port_c_suspend)) in get_hub_status_data()
94 * so we have to poll and check timeouts in order to take care of it.
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| /linux/Documentation/w1/slaves/ |
| H A D | w1_therm.rst | 16 -----------
49 -1 if at least one sensor still in conversion, 1 if conversion is complete
65 auto measure and set a conversion time by writing ``1`` to
66 ``conv_time``; 3) use ``features`` to enable poll for conversion
72 the sensor. Resolution is reset when the sensor gets power-cycled.
81 Some non-genuine DS18B20 chips are fixed in 12-bit mode only, so the actual
86 The write-only sysfs entry ``eeprom_cmd`` is an alternative for EEPROM operations.
94 Values shall be space separated and in the device range (typical -55 degC
106 be force-enabled.
118 location of the chip in the 1-wire bus without needing pre-existing
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| /linux/drivers/net/phy/ |
| H A D | motorcomm.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: Frank <Frank.Sae@motor-comm.com>
22 * ------------------------------------------------------------
26 * ------------------------------------------------------------
28 * ------------------------------------------------------------
86 /* Speed Auto Downgrade Control Register */
104 /* FIBER Auto-Negotiation link partner ability */
125 /* TX Gig-E Delay is bits 7:4, default 0x5
126 * TX Fast-E Delay is bits 15:12, default 0xf
127 * Delay = 150ps * N - 250ps
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| /linux/drivers/net/hamradio/ |
| H A D | z8530.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
61 #define AUTO_ENAB 0x20 /* Auto Enables */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
122 #define GAOP 0x10 /* Go active on poll */
153 #define AUTOECHO 8 /* Auto Echo */
199 /* Read Register 2 (channel b only) - Interrupt vector */
226 #define AUTOTXF 0x01 /* Auto Tx Flag */
227 #define AUTOEOM 0x02 /* Auto EOM Latch Reset */
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
| H A D | base.c | 32 if (therm->func->temp_get) in nvkm_therm_temp_get()
33 return therm->func->temp_get(therm); in nvkm_therm_temp_get()
34 return -ENODEV; in nvkm_therm_temp_get()
40 struct nvbios_therm_trip_point *trip = therm->fan->bios.trip, in nvkm_therm_update_trip()
42 *last_trip = therm->last_trip; in nvkm_therm_update_trip()
43 u8 temp = therm->func->temp_get(therm); in nvkm_therm_update_trip()
48 for (i = 0; i < therm->fan->bios.nr_fan_trip; i++) { in nvkm_therm_update_trip()
54 if (last_trip && temp <= (last_trip->temp) && in nvkm_therm_update_trip()
55 temp > (last_trip->temp - last_trip->hysteresis)) in nvkm_therm_update_trip()
59 duty = cur_trip->fan_duty; in nvkm_therm_update_trip()
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| /linux/Documentation/admin-guide/ |
| H A D | md.rst | 5 ---------------------------------
49 -1 linear mode
58 (raid-0 and raid-1 only)
78 --------------------------------------
87 that all auto-detected arrays are assembled as partitionable.
90 -------------------------------------------
102 mdadm --assemble --force ....
112 md-mod.start_dirty_degraded=1
116 ------------------
119 Currently, it supports superblock formats ``0.90.0`` and the ``md-1`` format
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| /linux/samples/nitro_enclaves/ |
| H A D | ne_ioctl_sample.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
11 * -----
19 * https://www.kernel.org/doc/html/latest/admin-guide/kernel-parameters.html#cpu-lists
26 * echo <cpu-list> > /sys/module/nitro_enclaves/parameters/ne_cpus
46 * https://www.kernel.org/doc/html/latest/admin-guide/mm/hugetlbpage.html
52 * /sys/devices/system/node/node<X>/hugepages/hugepages-2048kB/nr_hugepages
53 * /sys/devices/system/node/node<X>/hugepages/hugepages-1048576kB/nr_hugepages
58 * /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages
59 * /sys/kernel/mm/hugepages/hugepages-1048576kB/nr_hugepages
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| /linux/drivers/net/ethernet/marvell/ |
| H A D | sky2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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| /linux/drivers/macintosh/ |
| H A D | via-macii.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device driver for the via ADB on (many) Mac II-class machines
13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15 * - Big overhaul, should actually work now.
16 * 2006-12-31 Finn Thain - Another overhaul.
24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
39 /* VIA registers - spaced 0x200 bytes apart */
41 #define B 0 /* B-side data */
42 #define A RS /* A-side data */
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| /linux/Documentation/networking/ |
| H A D | driver.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 ------------------
21 ----------
25 be aborted. If necessary, poll or wait for completion of
28 Auto-close
29 ----------
38 ----------------------
46 for a driver implementing scatter-gather this means:
48 .. code-block:: c
52 u32 used = READ_ONCE(dr->prod) - READ_ONCE(dr->cons);
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| /linux/drivers/net/ethernet/cirrus/ |
| H A D | cs89x0.h | 1 /* Copyright, 1988-1992, Russell Nelson, Crynwr Software
18 #define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */
19 /* offset 2h -> Model/Product Number */
20 /* offset 3h -> Chip Revision Number */
50 #define PP_AutoNegCTL 0x011C /* Auto Negotiation Ctrl */
62 #define PP_AutoNegST 0x013E /* Auto Neg Status */
131 /* PP_RxCFG - Receive Configuration and Interrupt Mask bit definition - Read/write */
142 /* PP_RxCTL - Receive Control bit definition - Read/write */
153 /* Default receive mode - individually addressed, broadcast, and error free */
156 /* PP_TxCFG - Transmit Configuration Interrupt Mask bit definition - Read/write */
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| /linux/drivers/net/ethernet/intel/e1000/ |
| H A D | e1000_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
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