| /freebsd/sys/dev/e1000/ |
| H A D | e1000_mac.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * e1000_init_mac_ops_generic - Initialize MAC function pointers
45 * Setups up the function pointers to no-op functions
49 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_ops_generic()
53 mac->ops.init_params = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
54 mac->ops.init_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
55 mac->ops.reset_hw = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
56 mac->ops.setup_physical_interface = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
57 mac->ops.get_bus_info = e1000_null_ops_generic; in e1000_init_mac_ops_generic()
[all …]
|
| H A D | e1000_82543.c | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
81 * e1000_init_phy_params_82543 - Init PHY func ptrs.
86 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82543()
91 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82543()
92 phy->type = e1000_phy_none; in e1000_init_phy_params_82543()
95 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_82543()
96 phy->ops.power_down = e1000_power_down_phy_copper; in e1000_init_phy_params_82543()
99 phy->addr = 1; in e1000_init_phy_params_82543()
100 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82543()
[all …]
|
| /freebsd/sys/dev/igc/ |
| H A D | igc_mac.c | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_mac_ops_generic - Initialize MAC function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_mac_info *mac = &hw->mac; in igc_init_mac_ops_generic()
24 mac->ops.init_params = igc_null_ops_generic; in igc_init_mac_ops_generic()
25 mac->ops.config_collision_dist = igc_config_collision_dist_generic; in igc_init_mac_ops_generic()
26 mac->ops.rar_set = igc_rar_set_generic; in igc_init_mac_ops_generic()
30 * igc_null_ops_generic - No-op function, returns 0
40 * igc_null_mac_generic - No-op function, return void
[all …]
|
| H A D | igc_phy.c | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_phy_ops_generic - Initialize PHY function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic()
24 phy->ops.init_params = igc_null_ops_generic; in igc_init_phy_ops_generic()
25 phy->ops.acquire = igc_null_ops_generic; in igc_init_phy_ops_generic()
26 phy->ops.check_reset_block = igc_null_ops_generic; in igc_init_phy_ops_generic()
27 phy->ops.force_speed_duplex = igc_null_ops_generic; in igc_init_phy_ops_generic()
28 phy->ops.get_info = igc_null_ops_generic; in igc_init_phy_ops_generic()
[all …]
|
| H A D | igc_regs.h | 1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
11 #define IGC_CTRL 0x00000 /* Device Control - RW */
12 #define IGC_STATUS 0x00008 /* Device Status - RO */
13 #define IGC_EECD 0x00010 /* EEPROM/Flash Control - RW */
15 #define IGC_EERD 0x12014 /* EEprom mode read - RW */
16 #define IGC_EEWR 0x12018 /* EEprom mode write - RW */
17 #define IGC_CTRL_EXT 0x00018 /* Extended Device Control - RW */
18 #define IGC_MDIC 0x00020 /* MDI Control - RW */
19 #define IGC_MDICNFG 0x00E04 /* MDI Config - RW */
[all …]
|
| /freebsd/crypto/openssl/doc/designs/quic-design/ |
| H A D | quic-fc.md | 1 Flow Control
4 Introduction to QUIC Flow Control
5 ---------------------------------
7 QUIC flow control acts at both connection and stream levels. At any time,
8 transmission of stream data could be prevented by connection-level flow control,
9 by stream-level flow control, or both. Flow control uses a credit-based model in
10 which the relevant flow control limit is expressed as the maximum number of
14 It is important to note that both connection and stream-level flow control
15 relate only to the transmission of QUIC stream data. QUIC flow control at stream
18 again, this still only counts as one byte for the purposes of flow control. Note
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 1 //=- WebAssemblyFixIrreducibleControlFlow.cpp - Fix irreducible control flow -//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// This file implements a pass that removes irreducible control flow.
11 /// Irreducible control flow means multiple-entry loops, which this pass
14 /// Note that LLVM has a generic pass that lowers irreducible control flow, but
15 /// it linearizes control flow, turning diamonds into two triangles, which is
22 /// up multi-entry loops by adding a new block that can dispatch to each of the
44 /// * The Relooper emits structured control flow (with ifs etc.), while we
47 /// [1] Alon Zakai. 2011. Emscripten: an LLVM-to-JavaScript compiler. In
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | ADCE.cpp | 1 //===- ADCE.cpp - Code to perform dead code elimination -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
65 static cl::opt<bool> RemoveControlFlowFlag("adce-remove-control-flow",
68 // This option enables removing of may-be-infinite loops which have no other
70 static cl::opt<bool> RemoveLoops("adce-remove-loops", cl::init(false),
95 /// Control dependence sources need to be live for this block.
105 /// Cache of BB->getTerminator().
108 /// Post-order numbering of reverse control flow graph.
[all …]
|
| H A D | StructurizeCFG.cpp | 1 //===- StructurizeCFG.cpp -------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
58 const char FlowBlockName[] = "Flow";
63 "structurizecfg-skip-uniform-regions",
69 RelaxedUniformRegions("structurizecfg-relaxed-uniform-regions", cl::Hidden,
118 static bool filterSet(const NodeRef &N) { return N.second->count(N.first); } in filterSet()
130 auto *filter = N.second ? &filterSet : &filterAll; in children()
165 BasicBlock *NewResult = DT->findNearestCommonDominator(Result, BB); in addBlock()
193 /// Transforms the control flow graph on one single entry/exit region
[all …]
|
| /freebsd/sys/dev/sk/ |
| H A D | yukonreg.h | 2 /*-
21 #define YU_GPSR_SPEED 0x8000 /* speed 0 - 10Mbps, 1 - 100Mbps */
22 #define YU_GPSR_DUPLEX 0x4000 /* 0 - half duplex, 1 - full duplex */
23 #define YU_GPSR_FCTL_TX 0x2000 /* Tx flow control, 1 - disabled */
25 #define YU_GPSR_PAUSE 0x0800 /* flow control enable/disable */
30 #define YU_GPSR_GIG_SPEED 0x0010 /* Gigabit Speed (0 - use speed bit) */
32 #define YU_GPSR_FCTL_RX 0x0004 /* Rx flow control, 1 - disabled */
33 #define YU_GPSR_PROMS_EN 0x0002 /* promiscuous mode, 1 - enabled */
35 /* General Purpose Control Register (GPCR) */
38 #define YU_GPCR_FCTL_TX_DIS 0x2000 /* Disable Tx flow control 802.3x */
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SampleProfileInference.cpp | 1 //===- SampleProfileInference.cpp - Adjust sample profiles in the IR ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 // and edge counts that satisfy flow conservation rules, while minimally modify
14 //===----------------------------------------------------------------------===//
26 #define DEBUG_TYPE "sample-profile-inference"
31 "sample-profile-even-flow-distribution", cl::init(true), cl::Hidden,
32 cl::desc("Try to evenly distribute flow when there are multiple equally "
36 "sample-profile-rebalance-unknown", cl::init(true), cl::Hidden,
37 cl::desc("Evenly re-distribute flow among unknown subgraphs."));
[all …]
|
| H A D | FixIrreducible.cpp | 1 //===- FixIrreducible.cpp - Convert irreducible control-flow into loops ---===//
5 // SPDX-License-Identifie
[all...] |
| H A D | UnifyLoopExits.cpp | 1 //===- UnifyLoopExits.cpp - Redirect exiting edges to one block -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // block N such that all exiting blocks now branch to N, and then control flow
14 // (the "br" instruction). The presence of any other control flow
17 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "unify-loop-exits"
35 "max-booleans-in-control-flow-hub", cl::init(32), cl::Hidden,
63 INITIALIZE_PASS_BEGIN(UnifyLoopExitsLegacyPass, "unify-loop-exits",
68 INITIALIZE_PASS_END(UnifyLoopExitsLegacyPass, "unify-loop-exits", in INITIALIZE_PASS_DEPENDENCY()
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | milbeaut-uart.txt | 4 - compatible: should be "socionext,milbeaut-usio-uart".
5 - reg: offset and length of the register set for the device.
6 - interrupts: two interrupts specifier.
7 - interrupt-names: should be "rx", "tx".
8 - clocks: phandle to the input clock.
11 - auto-flow-control: flow control enable.
15 compatible = "socionext,milbeaut-usio-uart";
18 interrupt-names = "rx", "tx";
20 auto-flow-control;
|
| H A D | socionext,uniphier-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 const: socionext,uniphier-uart
28 auto-flow-control:
29 description: enable automatic flow control support.
33 - compatible
34 - reg
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | ice.4 | 2 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2019-2020, Intel Corporation
73 .Bl -bullet -compact
91 .Sx Link-Level Flow Control
113 .Sx Optics and auto-negotiation
115 .Sx PCI-Express Slot Bandwidth
212 flow control may mitigate the issue.
236 To use RDMA monitoring, more MSI-X interrupts may need to be reserved.
241 .Bd -literal -offset indent
245 The number of extra MSI-X interrupt vectors may need to be adjusted.
[all …]
|
| H A D | ng_btsocket.4 | 1 .\" Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
59 Raw HCI sockets can also be used to control HCI nodes.
62 .Bd -literal -offset indent
74 .Bl -tag -width foo
120 controls the control request timeout (in seconds) for raw HCI sockets.
126 .Bd -literal -offset indent
130 * For packet mask use (1 << (HCI packet indicator - 1))
131 * For event mask use (1 << (Event - 1))
151 .Bd -literal -offset indent
166 sockets used to control L2CAP nodes and to issue special L2CAP requests
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | InstructionPrecedenceTracking.cpp | 1 //===-- InstructionPrecedenceTracking.cpp -----------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // (e.g. as having implicit control flow, or writing memory, or having another
18 //===----------------------------------------------------------------------===//
33 "ipt-expensive-asserts",
65 getFirstSpecialInstruction(Insn->getParent()); in isPreceededBySpecialInstruction()
66 return MaybeFirstSpecial && MaybeFirstSpecial->comesBefore(Insn); in isPreceededBySpecialInstruction()
71 for (const auto &I : *BB) { in fill()
85 auto It = FirstSpecialInsts.find(BB); in validate()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Transforms/CFGuard/ |
| H A D | CFGuard.cpp | 1 //===-- CFGuard.cpp - Control Flow Guard checks -----------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// This file contains the IR transform to add Microsoft's Control Flow Guard
13 //===----------------------------------------------------------------------===//
32 STATISTIC(CFGuardCounter, "Number of Control Flow Guard checks added");
36 /// Adds Control Flow Guard (CFG) checks on indirect function calls/invokes.
38 /// address-taken function. X86_64 targets use the Mechanism::Dispatch
56 /// Inserts a Control Flow Guard (CFG) check on an indirect call using the CFG
59 /// symbol. This checks that the target address is a valid address-taken
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 1 //===- AArch64SpeculationHardening.cpp - Harden Against Missspeculation --===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===--
[all...] |
| /freebsd/sys/dev/cas/ |
| H A D | if_casreg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
57 #define CAS_BIM_RAM_BIST 0x1030 /* BIM RAM BIST control/status */
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
102 #define CAS_INTR_MAC_CTRL_INT 0x00010000 /* MAC control interrupt */
116 #define CAS_BIM_CONF_BD64_DIS 0x00000004 /* 64-bit mode disable */
118 #define CAS_BIM_CONF_BUS32_WIDE 0x00000010 /* PCI bus is 32-bit (ro). */
161 * interrupt bits for CAS_INTMASK[2-4], CAS_STATUS[2-4], CAS_CLEAR_ALIAS[2-4]
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeVGPRLiveRange.cpp | 1 //===--------------------- SIOptimizeVGPRLiveRange.cpp -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// This pass tries to remove unnecessary VGPR live ranges in divergent if-else
13 /// When we do structurization, we usually transform an if-else into two
14 /// successive if-then (with a flow block to do predicate inversion). Consider a
16 /// if-else and used in both THEN (use in THEN is optional) and ELSE part:
23 /// bb.flow:
30 /// As register allocator has no idea of the thread-control-flow, it will just
33 /// to exec mask. For this if-else case, the lanes active in bb.then will be
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
| H A D | SampleProfileInference.h | 1 //===- Transforms/Utils/SampleProfileInference.h ---------
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCBoolRetToInt.cpp | 1 //===- PPCBoolRetToInt.cpp ------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
20 // It might be useful to expand this pass to add bit-wise operations to the list
22 // represents logical AND and OR operations with control flow rather than data
23 // flow. For example by lowering the expression: return (A && B && C)
27 // There's code in SimplifyCFG that code be used to turn control flow in data
28 // flow using SelectInsts. Selects are slow on some architectures (P7/P8), so
32 //===----------------------------------------------------------------------===//
63 #define DEBUG_TYPE "ppc-bool-ret-to-int"
[all …]
|
| /freebsd/crypto/openssl/include/internal/ |
| H A D | quic_fc.h | 2 * Copyright 2022-2024 The OpenSSL Project Authors. All Rights Reserved.
19 * TX Flow Controller (TXFC)
22 * For discussion, see doc/designs/quic-design/quic-fc.md.
27 QUIC_TXFC *parent; /* stream-level iff non-NULL */
33 * Initialises a TX flow controller. conn_txfc should be non-NULL and point to
34 * the connection-level flow controller if the TXFC is for stream-level flow
35 * control, and NULL otherwise.
40 * Gets the parent (i.e., connection-level) TX flow controller. Returns NULL if
41 * called on a connection-level TX flow controller.
47 * operation. This function is a no-op if it has already been called with an
[all …]
|