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Searched +full:at91sam9260 +full:- +full:rtt (Results 1 – 13 of 13) sorted by relevance

/linux/Documentation/devicetree/bindings/rtc/
H A Datmel,at91sam9260-rtt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel AT91 RTT
11 - $ref: rtc.yaml#
14 - Alexandre Belloni <alexandre.belloni@bootlin.com>
19 - items:
20 - const: atmel,at91sam9260-rtt
21 - items:
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/linux/Documentation/devicetree/bindings/power/reset/
H A Datmel,at91sam9260-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - atmel,at91sam9260-shdwc
20 - atmel,at91sam9rl-shdwc
21 - atmel,at91sam9x5-shdwc
29 atmel,wakeup-mode:
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/linux/arch/arm/boot/dts/microchip/
H A Dusb_a9260.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * usb_a9260.dts - Device Tree file for Caloa USB A9260 board
5 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
8 #include "at91sam9260.dtsi"
13 compatible = "calao,usb-a9260", "atmel,at91sam9260", "atmel,at91sam9";
26 atmel,wakeup-counter = <10>;
27 atmel,wakeup-rtt-timer;
H A Dat91sam9263.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A Dat91-qil_a9260.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91-qil_a9260.dts - Device Tree file for Calao QIL A9260 board
5 * Copyright (C) 2011-2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
8 #include "at91sam9260.dtsi"
11 compatible = "calao,qil-a9260", "atmel,at91sam9260", "atmel,at91sam9";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
35 compatible = "atmel,tcb-timer";
40 compatible = "atmel,tcb-timer";
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H A Dat91sam9261.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A Dat91sam9260.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
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H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
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H A Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/clock/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pwm/pwm.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
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H A Dat91sam9g45.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
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/linux/drivers/irqchip/
H A Dirq-atmel-aic-common.c3 * irq-atmel-aic and irq-atmel-aic5 drivers
10 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
25 #include "irq-atmel-aic-common.h"
45 ct->chip.irq_mask(d); in aic_common_shutdown()
51 struct aic_chip_data *aic = gc->private; in aic_common_set_type()
62 if (!(d->mask & aic->ext_irqs)) in aic_common_set_type()
63 return -EINVAL; in aic_common_set_type()
68 if (!(d->mask & aic->ext_irqs)) in aic_common_set_type()
69 return -EINVAL; in aic_common_set_type()
74 return -EINVAL; in aic_common_set_type()
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/linux/drivers/power/reset/
H A Dat91-poweroff.c5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
28 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */
32 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */
33 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */
36 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */
37 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */
38 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */
65 /* Simple power-on, just bail out */ in at91_wakeup_status()
70 reason = "RTT"; in at91_wakeup_status()
76 dev_info(&pdev->dev, "Wake-Up source: %s\n", reason); in at91_wakeup_status()
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/linux/drivers/rtc/
H A Drtc-at91sam9.c1 // SPDX-License-Identifier: GPL-2.0+
3 * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
7 * Based on rtc-at91rm9200.c by Rick Bronson
30 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
33 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
35 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
46 #define AT91_RTT_MR 0x00 /* Real-time Mode Register */
52 #define AT91_RTT_AR 0x04 /* Real-time Alarm Register */
55 #define AT91_RTT_VR 0x08 /* Real-time Value Register */
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