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/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
46 struct hclge_dev *hdev = bus->priv; in hclge_mdio_write()
50 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) in hclge_mdio_write()
51 return -EBUSY; in hclge_mdio_write()
57 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_write()
59 hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M, in hclge_mdio_write()
62 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_write()
63 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_write()
65 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_write()
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/linux/tools/testing/selftests/net/
H A Dvrf_route_leaking.sh2 # SPDX-License-Identifier: GPL-2.0
13 # +----+ .253 +----+ .253 +----+
14 # | h1 |-------------------| r1 |-------------------| h2 |
15 # +----+ .1 +----+ .2 +----+
42 # .253 +----+ .253
43 # +----| r1 |----+
44 # | +----+ |
45 # +----+ | | +----+
46 # | h1 |--------------+ +--------------| h2 |
47 # +----+ .1 | | .2 +----+
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/linux/drivers/net/phy/
H A Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
34 #include <linux/pse-pd/pse.h>
45 #include "phylib-internal.h"
46 #include "phy-caps.h"
212 put_device(&phydev->mdio.dev); in phy_device_free()
226 fwnode_handle_put(dev->fwnode); in phy_device_release()
254 /* If the PHY is using driver-model based wakeup, use that state. */ in phy_may_wakeup()
256 return device_may_wakeup(&phydev->mdio.dev); in phy_may_wakeup()
264 struct net_device *netdev = phydev->attached_dev; in phy_link_change()
270 phydev->adjust_link(netdev); in phy_link_change()
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H A Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
23 #include "phy-caps.h"
39 * struct phylink - internal data type for phylink
56 u8 link_port; /* The current non-phy ethtool port */
71 /* Serialize updates to pl->phydev with phylink_resolve() */
105 if ((pl)->config->type == PHYLINK_NETDEV) \
106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
107 else if ((pl)->config->type == PHYLINK_DEV) \
108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
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/linux/drivers/net/ethernet/atheros/alx/
H A Dreg.h374 /* Size = tx-packet(1522) + IPG(12) + SOF(8) + 64(Pause) + IPG(12) + SOF(8) +
375 * rx-packet(1522) + delay-of-link(64)
490 /* re-send assert msg if SW no response */
522 /* bit23: adv Pause */
524 /* bit22: adv Asym Pause */
/linux/drivers/net/dsa/microchip/
H A Dksz8.c1 // SPDX-License-Identifier: GPL-2.0
6 * - KSZ8463
7 * - KSZ8863, KSZ8873 aka KSZ88X3
8 * - KSZ8895, KSZ8864 aka KSZ8895 family
9 * - KSZ8794, KSZ8795, KSZ8765 aka KSZ87XX
11 * - KSZ8563, KSZ8567 - see KSZ9477 driver
25 #include <linux/platform_data/microchip-ksz.h>
40 * We use only the high-byte (so odd addresses) of the 16-bits registers to fit
46 /* ksz88x3_drive_strengths - Drive strength mapping for KSZ8863, KSZ8873, ..
100 ksz_rmw8(dev, dev->dev_ops->get_port_addr(port, offset), bits, in ksz_port_cfg()
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/linux/drivers/net/ethernet/renesas/
H A Dravb_main.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2019 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
14 #include <linux/dma-mapping.h>
58 return -ETIMEDOUT; in ravb_wait()
90 switch (priv->speed) { in ravb_set_rate_gbeth()
107 switch (priv->speed) { in ravb_set_rate_rcar()
148 ravb_modify(priv->ndev, PIR, mask, set ? mask : 0); in ravb_mdio_ctrl()
175 return (ravb_read(priv->ndev, PIR) & PIR_MDI) != 0; in ravb_get_mdio_data()
191 return priv->rx_ring[q].raw + priv->info->rx_desc_size * i; in ravb_rx_get_desc()
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
262 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
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