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/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed,ast2x00-scu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 register control, ast2700-scu0 for soc0, ast2700-scu1 for soc1.
16 - Joel Stanley <joel@jms.id.au>
17 - Andrew Jeffery <andrew@aj.id.au>
22 - enum:
23 - aspeed,ast2400-scu
24 - aspeed,ast2500-scu
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/linux/drivers/soc/aspeed/
H A Daspeed-socinfo.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 const u32 id; member
20 /* AST2500 */
21 { "AST2500", 0x04000303 },
34 unsigned int id = siliconid & 0xff00ffff; in siliconid_to_name() local
38 if (rev_table[i].id == id) in siliconid_to_name()
51 /* AST2500 and below */ in siliconid_to_rev()
88 np = of_find_compatible_node(NULL, NULL, "aspeed,silicon-id"); in aspeed_socinfo_init()
91 return -ENODEV; in aspeed_socinfo_init()
97 return -ENODEV; in aspeed_socinfo_init()
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
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H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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/linux/drivers/gpu/drm/ast/
H A Dast_drv.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
44 static int ast_modeset = -1;
78 #define AST_VGA_DEVICE(id, info) { \ argument
82 .device = id, \
141 struct device *dev = &pdev->dev; in ast_detect_chip()
142 struct device_node *np = dev->of_node; in ast_detect_chip()
153 /* Check if we have device-tree properties */ in ast_detect_chip()
154 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", &data)) { in ast_detect_chip()
158 } else if (pdev->device == PCI_CHIP_AST2000) { // Not all families have a P2A bridge in ast_detect_chip()
172 /* Patch AST2500/AST2510 */ in ast_detect_chip()
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/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
44 #define HW_REVISION_ID 0x7C /* Silicon revision ID register */
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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