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/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed-lpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Aspeed Low Pin Count (LPC) Bus Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
21 The LPC controller is represented as a multi-function device to account for the
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/linux/Documentation/devicetree/bindings/ipmi/
H A Daspeed,ast2400-kcs-bmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
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H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
26 compatible = "shared-dma-pool";
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H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
24 compatible = "shared-dma-pool";
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H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/leds/common.h>
12 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
22 stdout-path = &uart5;
30 compatible = "gpio-leds";
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H A Daspeed-bmc-tyan-s8036.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
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H A Daspeed-bmc-facebook-tiogapass.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
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H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
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H A Daspeed-bmc-inspur-fp5280g2.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
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H A Daspeed-bmc-inspur-nf5280m6.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
15 stdout-path = &uart5;
23 reserved-memory {
24 #address-cells = <1>;
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H A Daspeed-bmc-asrock-x570d4u.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/common.h>
9 compatible = "asrock,x570d4u-bmc", "aspeed,ast2500";
19 stdout-path = &uart5;
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
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H A Daspeed-bmc-bytedance-g220a.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "bytedance,g220a-bmc", "aspeed,ast2500";
57 stdout-path = &uart5;
65 reserved-memory {
66 #address-cells = <1>;
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2500-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2500 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
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/linux/Documentation/devicetree/bindings/soc/aspeed/
H A Duart-routing.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/soc/aspeed/uart-routing.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Oskar Senft <osk@google.com>
13 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
17 the built-in UARTS and physical serial I/O ports.
20 This can be used to enable Host <-> BMC communication via UARTs, e.g. to
30 - enum:
31 - aspeed,ast2400-uart-routing
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/linux/drivers/char/ipmi/
H A Dkcs_bmc_aspeed.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
27 #define DEVICE_NAME "ast-kcs-bmc"
34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
39 * IRQXEy Assert the SerIRQ specified in IDyIRQX for LPC channel y
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/linux/drivers/reset/
H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update()
49 spin_unlock_irqrestore(&data->lock, flags); in reset_simple_update()
72 if (!data->reset_us) in reset_simple_reset()
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/linux/drivers/clk/
H A Dclk-aspeed.c1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
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/linux/drivers/tty/serial/8250/
H A D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
61 * to the host on the Host <-> BMC LPC bus. It could be different on a
67 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
72 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
90 return -EINVAL; in aspeed_vuart_set_lpc_address()
134 return -EINVAL; in aspeed_vuart_set_sirq()
250 struct aspeed_vuart *vuart = uart_8250_port->port.private_data; in aspeed_vuart_startup()
265 struct aspeed_vuart *vuart = uart_8250_port->port.private_data; in aspeed_vuart_shutdown()
278 lockdep_assert_held_once(&up->port.lock); in __aspeed_vuart_set_throttle()
280 up->ier &= ~irqs; in __aspeed_vuart_set_throttle()
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/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
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H A Dpinmux-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * read-only).
23 * SoC Multi-function Pin Expression Examples
24 * ------------------------------------------
26 * Here are some sample mux configurations from the AST2400 and AST2500
34 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
36 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
38 * C5 is a multi-signal pin (high and low priority signals). Here we touch
41 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
43 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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