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/linux/tools/perf/arch/x86/tests/
H A Dinsn-x86-dat-src.c21 asm volatile("rdtsc"); /* Start here */ in main()
25 asm volatile("vcvtph2ps %xmm3,%ymm5"); in main()
31 asm volatile("cmovno %rax,%rbx"); in main()
32 asm volatile("cmovno 0x12345678(%rax),%rcx"); in main()
33 asm volatile("cmovno 0x12345678(%rax),%cx"); in main()
35 asm volatile("cmove %rax,%rbx"); in main()
36 asm volatile("cmove 0x12345678(%rax),%rcx"); in main()
37 asm volatile("cmove 0x12345678(%rax),%cx"); in main()
39 asm volatile("seto 0x12345678(%rax)"); in main()
40 asm volatile("setno 0x12345678(%rax)"); in main()
[all …]
/linux/lib/raid6/
H A Dsse2.c48 asm volatile("movdqa %0,%%xmm0" : : "m" (raid6_sse_constants.x1d[0])); in raid6_sse21_gen_syndrome()
49 asm volatile("pxor %xmm5,%xmm5"); /* Zero temp */ in raid6_sse21_gen_syndrome()
52 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_sse21_gen_syndrome()
53 asm volatile("movdqa %0,%%xmm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_sse21_gen_syndrome()
54 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_sse21_gen_syndrome()
55 asm volatile("movdqa %xmm2,%xmm4"); /* Q[0] */ in raid6_sse21_gen_syndrome()
56 asm volatile("movdqa %0,%%xmm6" : : "m" (dptr[z0-1][d])); in raid6_sse21_gen_syndrome()
58 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_sse21_gen_syndrome()
59 asm volatile("pcmpgtb %xmm4,%xmm5"); in raid6_sse21_gen_syndrome()
60 asm volatile("paddb %xmm4,%xmm4"); in raid6_sse21_gen_syndrome()
[all …]
H A Davx2.c46 asm volatile("vmovdqa %0,%%ymm0" : : "m" (raid6_avx2_constants.x1d[0])); in raid6_avx21_gen_syndrome()
47 asm volatile("vpxor %ymm3,%ymm3,%ymm3"); /* Zero temp */ in raid6_avx21_gen_syndrome()
50 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_avx21_gen_syndrome()
51 asm volatile("vmovdqa %0,%%ymm2" : : "m" (dptr[z0][d]));/* P[0] */ in raid6_avx21_gen_syndrome()
52 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_avx21_gen_syndrome()
53 asm volatile("vmovdqa %ymm2,%ymm4");/* Q[0] */ in raid6_avx21_gen_syndrome()
54 asm volatile("vmovdqa %0,%%ymm6" : : "m" (dptr[z0-1][d])); in raid6_avx21_gen_syndrome()
56 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_avx21_gen_syndrome()
57 asm volatile("vpcmpgtb %ymm4,%ymm3,%ymm5"); in raid6_avx21_gen_syndrome()
58 asm volatile("vpaddb %ymm4,%ymm4,%ymm4"); in raid6_avx21_gen_syndrome()
[all …]
H A Drecov_ssse3.c54 asm volatile("movdqa %0,%%xmm7" : : "m" (x0f[0])); in raid6_2data_recov_ssse3()
57 asm volatile("movdqa %0,%%xmm6" : : "m" (qmul[0])); in raid6_2data_recov_ssse3()
58 asm volatile("movdqa %0,%%xmm14" : : "m" (pbmul[0])); in raid6_2data_recov_ssse3()
59 asm volatile("movdqa %0,%%xmm15" : : "m" (pbmul[16])); in raid6_2data_recov_ssse3()
67 asm volatile("movdqa %0,%%xmm1" : : "m" (q[0])); in raid6_2data_recov_ssse3()
68 asm volatile("movdqa %0,%%xmm9" : : "m" (q[16])); in raid6_2data_recov_ssse3()
69 asm volatile("movdqa %0,%%xmm0" : : "m" (p[0])); in raid6_2data_recov_ssse3()
70 asm volatile("movdqa %0,%%xmm8" : : "m" (p[16])); in raid6_2data_recov_ssse3()
71 asm volatile("pxor %0,%%xmm1" : : "m" (dq[0])); in raid6_2data_recov_ssse3()
72 asm volatile("pxor %0,%%xmm9" : : "m" (dq[16])); in raid6_2data_recov_ssse3()
[all …]
H A Drecov_loongarch_simd.c69 asm volatile("vld $vr20, %0" : : "m" (qmul[0])); in raid6_2data_recov_lsx()
70 asm volatile("vld $vr21, %0" : : "m" (qmul[16])); in raid6_2data_recov_lsx()
71 asm volatile("vld $vr22, %0" : : "m" (pbmul[0])); in raid6_2data_recov_lsx()
72 asm volatile("vld $vr23, %0" : : "m" (pbmul[16])); in raid6_2data_recov_lsx()
76 asm volatile("vld $vr4, %0" : : "m" (q[0])); in raid6_2data_recov_lsx()
77 asm volatile("vld $vr5, %0" : : "m" (q[16])); in raid6_2data_recov_lsx()
78 asm volatile("vld $vr6, %0" : : "m" (q[32])); in raid6_2data_recov_lsx()
79 asm volatile("vld $vr7, %0" : : "m" (q[48])); in raid6_2data_recov_lsx()
81 asm volatile("vld $vr8, %0" : : "m" (dq[0])); in raid6_2data_recov_lsx()
82 asm volatile("vld $vr9, %0" : : "m" (dq[16])); in raid6_2data_recov_lsx()
[all …]
H A Drecov_avx2.c53 asm volatile("vpbroadcastb %0, %%ymm7" : : "m" (x0f)); in raid6_2data_recov_avx2()
57 asm volatile("vmovdqa %0, %%ymm1" : : "m" (q[0])); in raid6_2data_recov_avx2()
58 asm volatile("vmovdqa %0, %%ymm9" : : "m" (q[32])); in raid6_2data_recov_avx2()
59 asm volatile("vmovdqa %0, %%ymm0" : : "m" (p[0])); in raid6_2data_recov_avx2()
60 asm volatile("vmovdqa %0, %%ymm8" : : "m" (p[32])); in raid6_2data_recov_avx2()
61 asm volatile("vpxor %0, %%ymm1, %%ymm1" : : "m" (dq[0])); in raid6_2data_recov_avx2()
62 asm volatile("vpxor %0, %%ymm9, %%ymm9" : : "m" (dq[32])); in raid6_2data_recov_avx2()
63 asm volatile("vpxor %0, %%ymm0, %%ymm0" : : "m" (dp[0])); in raid6_2data_recov_avx2()
64 asm volatile("vpxor %0, %%ymm8, %%ymm8" : : "m" (dp[32])); in raid6_2data_recov_avx2()
73 asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (qmul[0])); in raid6_2data_recov_avx2()
[all …]
H A Dloongarch_simd.c54 asm volatile("vld $vr0, %0" : : "m"(dptr[z0][d+0*NSIZE])); in raid6_lsx_gen_syndrome()
55 asm volatile("vld $vr1, %0" : : "m"(dptr[z0][d+1*NSIZE])); in raid6_lsx_gen_syndrome()
56 asm volatile("vld $vr2, %0" : : "m"(dptr[z0][d+2*NSIZE])); in raid6_lsx_gen_syndrome()
57 asm volatile("vld $vr3, %0" : : "m"(dptr[z0][d+3*NSIZE])); in raid6_lsx_gen_syndrome()
58 asm volatile("vori.b $vr4, $vr0, 0"); in raid6_lsx_gen_syndrome()
59 asm volatile("vori.b $vr5, $vr1, 0"); in raid6_lsx_gen_syndrome()
60 asm volatile("vori.b $vr6, $vr2, 0"); in raid6_lsx_gen_syndrome()
61 asm volatile("vori.b $vr7, $vr3, 0"); in raid6_lsx_gen_syndrome()
64 asm volatile("vld $vr8, %0" : : "m"(dptr[z][d+0*NSIZE])); in raid6_lsx_gen_syndrome()
65 asm volatile("vld $vr9, %0" : : "m"(dptr[z][d+1*NSIZE])); in raid6_lsx_gen_syndrome()
[all …]
H A Dsse1.c52 asm volatile("movq %0,%%mm0" : : "m" (raid6_mmx_constants.x1d)); in raid6_sse11_gen_syndrome()
53 asm volatile("pxor %mm5,%mm5"); /* Zero temp */ in raid6_sse11_gen_syndrome()
56 asm volatile("prefetchnta %0" : : "m" (dptr[z0][d])); in raid6_sse11_gen_syndrome()
57 asm volatile("movq %0,%%mm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_sse11_gen_syndrome()
58 asm volatile("prefetchnta %0" : : "m" (dptr[z0-1][d])); in raid6_sse11_gen_syndrome()
59 asm volatile("movq %mm2,%mm4"); /* Q[0] */ in raid6_sse11_gen_syndrome()
60 asm volatile("movq %0,%%mm6" : : "m" (dptr[z0-1][d])); in raid6_sse11_gen_syndrome()
62 asm volatile("prefetchnta %0" : : "m" (dptr[z][d])); in raid6_sse11_gen_syndrome()
63 asm volatile("pcmpgtb %mm4,%mm5"); in raid6_sse11_gen_syndrome()
64 asm volatile("paddb %mm4,%mm4"); in raid6_sse11_gen_syndrome()
[all …]
H A Dmmx.c47 asm volatile("movq %0,%%mm0" : : "m" (raid6_mmx_constants.x1d)); in raid6_mmx1_gen_syndrome()
48 asm volatile("pxor %mm5,%mm5"); /* Zero temp */ in raid6_mmx1_gen_syndrome()
51 asm volatile("movq %0,%%mm2" : : "m" (dptr[z0][d])); /* P[0] */ in raid6_mmx1_gen_syndrome()
52 asm volatile("movq %mm2,%mm4"); /* Q[0] */ in raid6_mmx1_gen_syndrome()
54 asm volatile("movq %0,%%mm6" : : "m" (dptr[z][d])); in raid6_mmx1_gen_syndrome()
55 asm volatile("pcmpgtb %mm4,%mm5"); in raid6_mmx1_gen_syndrome()
56 asm volatile("paddb %mm4,%mm4"); in raid6_mmx1_gen_syndrome()
57 asm volatile("pand %mm0,%mm5"); in raid6_mmx1_gen_syndrome()
58 asm volatile("pxor %mm5,%mm4"); in raid6_mmx1_gen_syndrome()
59 asm volatile("pxor %mm5,%mm5"); in raid6_mmx1_gen_syndrome()
[all …]
/linux/arch/x86/kvm/
H A Dfpu.h6 #include <asm/fpu/api.h>
21 case 0: asm("movdqa %%xmm0, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
22 case 1: asm("movdqa %%xmm1, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
23 case 2: asm("movdqa %%xmm2, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
24 case 3: asm("movdqa %%xmm3, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
25 case 4: asm("movdqa %%xmm4, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
26 case 5: asm("movdqa %%xmm5, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
27 case 6: asm("movdqa %%xmm6, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
28 case 7: asm("movdqa %%xmm7, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
30 case 8: asm("movdqa %%xmm8, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
[all …]
/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_msg_arm64.h53 register u64 x0 asm("x0") = VMWARE_HYPERVISOR_MAGIC; in vmware_hypercall1()
54 register u64 x1 asm("x1") = in1; in vmware_hypercall1()
55 register u64 x2 asm("x2") = cmd; in vmware_hypercall1()
56 register u64 x3 asm("x3") = VMWARE_HYPERVISOR_PORT; in vmware_hypercall1()
57 register u64 x7 asm("x7") = ((u64)X86_IO_MAGIC << 32) | in vmware_hypercall1()
76 register u64 x0 asm("x0") = VMWARE_HYPERVISOR_MAGIC; in vmware_hypercall5()
77 register u64 x1 asm("x1") = in1; in vmware_hypercall5()
78 register u64 x2 asm("x2") = cmd; in vmware_hypercall5()
79 register u64 x3 asm("x3") = in3 | VMWARE_HYPERVISOR_PORT; in vmware_hypercall5()
80 register u64 x4 asm("x4") = in4; in vmware_hypercall5()
[all …]
/linux/arch/m68k/kernel/
H A Dvectors.c27 #include <asm/setup.h>
28 #include <asm/fpu.h>
29 #include <asm/traps.h>
45 asm(".text\n"
67 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp"); in base_trap_init()
98 asmlinkage void dz_vec(void) asm ("dz"); in trap_init()
99 asmlinkage void inex_vec(void) asm ("inex"); in trap_init()
100 asmlinkage void ovfl_vec(void) asm ("ovfl"); in trap_init()
101 asmlinkage void unfl_vec(void) asm ("unfl"); in trap_init()
102 asmlinkage void snan_vec(void) asm ("snan"); in trap_init()
[all …]
/linux/arch/sh/include/asm/
H A Dbitops.h10 #include <asm/byteorder.h>
11 #include <asm/barrier.h>
14 #include <asm/bitops-grb.h>
16 #include <asm-generic/bitops/atomic.h>
17 #include <asm/bitops-op32.h>
19 #include <asm/bitops-llsc.h>
21 #include <asm/bitops-cas.h>
23 #include <asm-generic/bitops/atomic.h>
24 #include <asm-generic/bitops/non-atomic.h>
61 #include <asm-generic/bitops/ffs.h>
[all …]
/linux/arch/csky/include/asm/
H A Dbitops.h7 #include <asm/barrier.h>
10 * asm-generic/bitops/ffs.h
17 asm volatile ( in ffs()
27 * asm-generic/bitops/__ffs.h
31 asm volatile ( in __ffs()
40 * asm-generic/bitops/fls.h
44 asm volatile( in fls()
53 * asm-generic/bitops/__fls.h
60 #include <asm-generic/bitops/ffz.h>
61 #include <asm-generic/bitops/fls64.h>
[all …]
H A Dbarrier.h8 #define nop() asm volatile ("nop\n":::"memory")
44 #define __bar_brw() asm volatile (".long 0x842cc000\n":::"memory")
45 #define __bar_br() asm volatile (".long 0x8424c000\n":::"memory")
46 #define __bar_bw() asm volatile (".long 0x8428c000\n":::"memory")
47 #define __bar_arw() asm volatile (".long 0x8423c000\n":::"memory")
48 #define __bar_ar() asm volatile (".long 0x8421c000\n":::"memory")
49 #define __bar_aw() asm volatile (".long 0x8422c000\n":::"memory")
50 #define __bar_brwarw() asm volatile (FULL_FENCE:::"memory")
51 #define __bar_brarw() asm volatile (ACQUIRE_FENCE:::"memory")
52 #define __bar_bwarw() asm volatile (".long 0x842bc000\n":::"memory")
[all …]
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_sdiv.c19 asm volatile (" \ in sdiv32_non_zero_imm_1()
31 asm volatile (" \ in sdiv32_non_zero_imm_2()
43 asm volatile (" \ in sdiv32_non_zero_imm_3()
55 asm volatile (" \ in sdiv32_non_zero_imm_4()
67 asm volatile (" \ in sdiv32_non_zero_imm_5()
79 asm volatile (" \ in sdiv32_non_zero_imm_6()
91 asm volatile (" \ in sdiv32_non_zero_imm_7()
103 asm volatile (" \ in sdiv32_non_zero_imm_8()
115 asm volatile (" \ in sdiv32_non_zero_reg_1()
128 asm volatile (" \ in sdiv32_non_zero_reg_2()
[all …]
/linux/arch/loongarch/include/asm/
H A Dbitops.h14 #include <asm/barrier.h>
16 #include <asm-generic/bitops/builtin-ffs.h>
17 #include <asm-generic/bitops/builtin-fls.h>
18 #include <asm-generic/bitops/builtin-__ffs.h>
19 #include <asm-generic/bitops/builtin-__fls.h>
21 #include <asm-generic/bitops/ffz.h>
22 #include <asm-generic/bitops/fls64.h>
24 #include <asm-generic/bitops/sched.h>
25 #include <asm-generic/bitops/hweight.h>
27 #include <asm-generic/bitops/atomic.h>
[all …]
/linux/arch/s390/include/asm/
H A Dfpu-insn.h10 #include <asm/fpu-insn-asm.h>
15 #include <asm/asm-extable.h>
17 asm(".include \"asm/fpu-insn-asm.h\"\n");
41 asm volatile("cefbr %[f1],%[val]\n" in fpu_cefbr()
51 asm volatile("cgebr %[val],%[mode],%[f2]\n" in fpu_cgebr()
60 asm volatile("debr %[f1],%[f2]\n" in fpu_debr()
69 asm volatile("ld %[fpr],%[reg]\n" in fpu_ld()
77 asm volatile("ldgr %[f1],%[val]\n" in fpu_ldgr()
86 asm volatile("lfpc %[fpc]" in fpu_lfpc()
116 asm volatile("std %[fpr],%[reg]\n" in fpu_std()
[all …]
/linux/drivers/staging/octeon/
H A Docteon-ethernet.h19 #include <asm/octeon/octeon.h>
21 #include <asm/octeon/cvmx-asxx-defs.h>
22 #include <asm/octeon/cvmx-config.h>
23 #include <asm/octeon/cvmx-fau.h>
24 #include <asm/octeon/cvmx-gmxx-defs.h>
25 #include <asm/octeon/cvmx-helper.h>
26 #include <asm/octeon/cvmx-helper-util.h>
27 #include <asm/octeon/cvmx-ipd.h>
28 #include <asm/octeon/cvmx-ipd-defs.h>
29 #include <asm/octeon/cvmx-npi-defs.h>
[all …]
/linux/include/asm-generic/
H A Dbitops.h16 #include <asm/barrier.h>
18 #include <asm-generic/bitops/__ffs.h>
19 #include <asm-generic/bitops/ffz.h>
20 #include <asm-generic/bitops/fls.h>
21 #include <asm-generic/bitops/__fls.h>
22 #include <asm-generic/bitops/fls64.h>
28 #include <asm-generic/bitops/sched.h>
29 #include <asm-generic/bitops/ffs.h>
30 #include <asm-generic/bitops/hweight.h>
31 #include <asm-generic/bitops/lock.h>
[all …]
/linux/arch/m68k/include/asm/
H A Dmcfsim.h21 #include <asm/m5206sim.h>
22 #include <asm/mcfintc.h>
24 #include <asm/m520xsim.h>
26 #include <asm/m523xsim.h>
27 #include <asm/mcfintc.h>
29 #include <asm/m525xsim.h>
30 #include <asm/mcfintc.h>
32 #include <asm/m527xsim.h>
34 #include <asm/m5272sim.h>
36 #include <asm/m528xsim.h>
[all …]
/linux/arch/arm64/include/asm/
H A Dbitops.h14 #include <asm-generic/bitops/builtin-__ffs.h>
15 #include <asm-generic/bitops/builtin-ffs.h>
16 #include <asm-generic/bitops/builtin-__fls.h>
17 #include <asm-generic/bitops/builtin-fls.h>
19 #include <asm-generic/bitops/ffz.h>
20 #include <asm-generic/bitops/fls64.h>
22 #include <asm-generic/bitops/sched.h>
23 #include <asm-generic/bitops/hweight.h>
25 #include <asm-generic/bitops/atomic.h>
26 #include <asm-generic/bitops/lock.h>
[all …]
/linux/arch/openrisc/include/asm/
H A Dbitops.h26 #include <asm/barrier.h>
28 #include <asm/bitops/__ffs.h>
29 #include <asm-generic/bitops/ffz.h>
30 #include <asm/bitops/fls.h>
31 #include <asm/bitops/__fls.h>
32 #include <asm-generic/bitops/fls64.h>
38 #include <asm-generic/bitops/sched.h>
39 #include <asm/bitops/ffs.h>
40 #include <asm-generic/bitops/hweight.h>
41 #include <asm-generic/bitops/lock.h>
[all …]
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-asm.h30 * This is file defines ASM primitives for the executive.
35 #include <asm/octeon/octeon-model.h>
38 #define CVMX_SYNC asm volatile ("sync" : : : "memory")
39 /* String version of SYNCW macro for using in inline asm constructs */
44 #define CVMX_SYNCIO asm volatile ("nop")
46 #define CVMX_SYNCIOBDMA asm volatile ("synciobdma" : : : "memory")
49 #define CVMX_SYNCIOALL asm volatile ("nop")
58 #define CVMX_SYNCW asm volatile ("syncw\n\tsyncw" : : : "memory")
73 #define CVMX_SYNCIO asm volatile ("nop")
75 #define CVMX_SYNCIOBDMA asm volatile ("sync" : : : "memory")
[all …]
/linux/arch/mips/sgi-ip27/
H A Dip27-init.c16 #include <asm/bootinfo.h>
17 #include <asm/cpu.h>
18 #include <asm/io.h>
19 #include <asm/sgialib.h>
20 #include <asm/time.h>
21 #include <asm/sn/agent.h>
22 #include <asm/sn/types.h>
23 #include <asm/sn/klconfig.h>
24 #include <asm/sn/ioc3.h>
25 #include <asm/mipsregs.h>
[all …]

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