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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dmarvell,armada-370-xp-timer.txt1 Marvell Armada 370 and Armada XP Timers
2 ---------------------------------------
5 - compatible: Should be one of the following
6 "marvell,armada-370-timer",
7 "marvell,armada-375-timer",
8 "marvell,armada-xp-timer".
9 - interrupts: Should contain the list of Global Timer interrupts and
10 then local timer interrupts
11 - reg: Should contain location and length for timers register. First
12 pair for the Global Timer registers, second pair for the
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H A Dmarvell,armada-370-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/marvell,armada-370-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Armada 370, 375, 380 and XP Timers
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
16 - items:
17 - const: marvell,armada-380-timer
18 - const: marvell,armada-xp-timer
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada XP family SoC
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 * Contains definitions specific to the Armada XP SoC that are not
13 * common to all Armada SoCs.
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
22 model = "Marvell Armada XP family SoC";
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H A Darmada-xp-98dx3236.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * common to all Armada XP SoCs.
11 #include "armada-370-xp.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,98dx3236-smp";
33 compatible = "marvell,sheeva-v7";
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H A Darmada-370-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 * This file contains the definitions that are common to the Armada
13 * 370 and Armada XP SoC.
19 model = "Marvell Armada 370 and XP SoC";
20 compatible = "marvell,armada-370-xp";
28 #address-cells = <1>;
29 #size-cells = <0>;
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H A Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 38x family of SoCs.
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 38x family SoC";
32 compatible = "arm,cortex-a9-pmu";
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H A Darmada-370.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 370 family SoC
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * Contains definitions specific to the Armada 370 SoC that are not
12 * common to all Armada SoCs.
15 #include "armada-370-xp.dtsi"
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 370 family SoC";
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H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 39x family of SoCs.
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Marvell Armada 39x family SoC";
31 #address-cells = <1>;
32 #size-cells = <0>;
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H A Darmada-370-mirabox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
30 internal-regs {
34 timer@20300 {
35 clock-frequency = <600000000>;
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H A Darmada-xp-lenovo-ix4-300d.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Lenovo Iomega ix4-300d
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
15 model = "Lenovo Iomega ix4-300d";
16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230",
17 "marvell,armadaxp", "marvell,armada-370-xp";
20 stdout-path = "serial0:115200n8";
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dmarvel.txt5 - Compatibility : "marvell,orion-wdt"
6 "marvell,armada-370-wdt"
7 "marvell,armada-xp-wdt"
8 "marvell,armada-375-wdt"
9 "marvell,armada-380-wdt"
11 - reg : Should contain two entries: first one with the
12 timer control address, second one with the
15 For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
17 - reg : A third entry is mandatory and should contain the
20 Clocks required for compatibles = "marvell,orion-wdt",
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-xp-pinctrl.txt1 * Marvell Armada XP SoC pinctrl driver for mpp
3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
11 This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.
17 * Marvell Armada XP (all variants)
50 mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk)
61 mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),
63 mpp41 41 gpio, spi0(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),
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/freebsd/sys/arm/mv/
H A Dtimer.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD.
92 { -1, 0 }
97 {"marvell,armada-380-timer", MV_NONE },
98 {"marvell,armada-xp-timer", MV_TMR | MV_WDT },
99 {"mrvl,timer", MV_TMR | MV_WDT },
140 {"marvell,armada-xp-timer", (uintptr_t)&timer_armadaxp_config },
159 if (ofw_bus_search_compatible(dev, mv_timer_compat)->ocd_data == MV_NONE) in mv_timer_probe()
162 device_set_desc(dev, "Marvell CPU Timer"); in mv_timer_probe()
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/freebsd/sys/arm64/conf/
H A DNOTES2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
30 options VFP # Floating-point support
53 # Timer drivers
69 # Microsoft Hyper-V
80 device al_pci # Annapurna Alpine PCI-E
81 options PCI_HP # PCI-Express native HotPlug
82 options PCI_IOV # PCI SR-IOV support
88 device neta # Marvell Armada 370/38x/XP/3700 NIC
102 # Broadcom MPT Fusion, version 4, is 64-bit only
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/freebsd/sys/arm/mv/armada/
H A Dwdt.c1 /*-
3 * Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD.
103 { -1, 0 }
107 {"marvell,armada-380-wdt", (uintptr_t)&mv_wdt_armada_38x_config},
108 {"marvell,armada-xp-wdt", (uintptr_t)&mv_wdt_armada_xp_config},
109 {"marvell,orion-wdt", (uintptr_t)&mv_wdt_armv5_config},
146 if (!ofw_bus_search_compatible(dev, mv_wdt_compat)->ocd_data) in mv_wdt_probe()
149 device_set_desc(dev, "Marvell Watchdog Timer"); in mv_wdt_probe()
165 error = bus_alloc_resources(dev, mv_wdt_spec, &sc->wdt_res); in mv_wdt_attach()
171 mtx_init(&sc->wdt_mtx, "watchdog", NULL, MTX_DEF); in mv_wdt_attach()
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/freebsd/sys/dts/arm/
H A Ddb78460.dts3 * Copyright (c) 2010-2011 Semihalf
27 * Marvell DB-78460 Device Tree Source.
30 /dts-v1/;
33 model = "mrvl,DB-78460";
34 #address-cells = <1>;
35 #size-cells = <1>;
42 #address-cells = <1>;
43 #size-cells = <0>;
49 d-cache-line-size = <32>; // 32 bytes
50 i-cache-line-size = <32>; // 32 bytes
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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