Searched +full:armada +full:- +full:8 +full:k +full:- +full:nand +full:- +full:controller (Results 1 – 6 of 6) sorted by relevance
| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell NAND Flash Controller (NFC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - items:
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
18 - enum:
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mvebu-devbus.txt | 3 The Device Bus controller available in some Marvell's SoC allows to control
4 different types of standard memory and I/O devices such as NOR, NAND, and FPGA.
9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
17 the controller's register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
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| /linux/drivers/mtd/nand/raw/ |
| H A D | marvell_nand.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Marvell NAND flash controller driver
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
9 * This NAND controller driver handles two versions of the hardware,
11 * called NFCv2 and is available on Armada SoCs.
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
26 * controller when Hamming is chosen:
28 * +-------------------------------------------------------------+
30 * +-------------------------------------------------------------+
36 * 30B per ECC chunk. Here is the page layout used by the controller
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | dove.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 model = "Marvell Armada 88AP510 SoC";
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
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| /linux/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
65 Enable support for Altera / Intel mSGDMA controller.
93 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
96 tristate "Arm DMA-350 support"
101 Enable support for the Arm DMA-350 controller.
109 Support the Atmel AHB DMA controller.
116 Support the Atmel XDMA controller.
119 tristate "Analog Devices AXI-DMAC DMA support"
125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
126 controller is often used in Analog Devices' reference designs for FPGA
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| /linux/ |
| H A D | CREDITS | 1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
21 D: Samsung pin controller driver
51 D: in-kernel DRM Maintainer
76 E: tim_alpaerts@toyota-motor-europe.com
80 S: B-2610 Wilrijk-Antwerpen
85 W: http://www-stu.christs.cam.ac.uk/~aia21/
106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
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