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Searched +full:ar7100 +full:- +full:cpu +full:- +full:intc (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqca,ar7100-cpu-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-cpu-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros ath79 CPU interrupt controller
10 - Alban Bedel <albeu@free.fr>
15 qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties.
20 - items:
21 - const: qca,ar9132-cpu-intc
22 - const: qca,ar7100-cpu-intc
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/linux/drivers/irqchip/
H A Dirq-ath79-cpu.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
18 #include <asm/mach-ath79/ath79.h>
31 -1, -1, -1, -1, -1, -1, -1, -1,
48 irq = fls(pending) - 1; in plat_irq_dispatch()
49 if (irq < ARRAY_SIZE(irq_wb_chan) && irq_wb_chan[irq] != -1) in plat_irq_dispatch()
63 node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); in ar79_cpu_intc_of_init()
70 node, "qca,ddr-wb-channel-interrupts", i, &irq); in ar79_cpu_intc_of_init()
75 node, "qca,ddr-wb-channels", in ar79_cpu_intc_of_init()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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