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/linux/Documentation/devicetree/bindings/clock/
H A Dimx6sx-clock.yaml37 - description: anaclk1 clock input
46 - const: anaclk1
70 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
71 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
H A Dimx6q-clock.yaml36 - description: anaclk1 clock input
44 - const: anaclk1
/linux/drivers/clk/imx/
H A Dclk-vf610.c195 clk[VF610_CLK_ANACLK1] = vf610_get_fixed_clock(ccm_node, "anaclk1"); in vf610_clocks_init()
252 clk[VF610_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", ANA_MISC1, 12, BIT(10)); in vf610_clocks_init()
H A Dclk-imx6sl.c200 hws[IMX6SL_CLK_ANACLK1] = imx_obtain_fixed_clock_hw("anaclk1", 0); in imx6sl_clocks_init()
252 …hws[IMX6SL_CLK_LVDS1_IN] = imx_clk_hw_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(… in imx6sl_clocks_init()
H A Dclk-imx6sx.c144 hws[IMX6SX_CLK_ANACLK1] = imx_get_clk_hw_by_name(ccm_node, "anaclk1"); in imx6sx_clocks_init()
216 …hws[IMX6SX_CLK_LVDS1_IN] = imx_clk_hw_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, … in imx6sx_clocks_init()
H A Dclk-imx6q.c457 hws[IMX6QDL_CLK_ANACLK1] = imx6q_obtain_fixed_clk_hw(ccm_node, "anaclk1", 0); in imx6q_clocks_init()
573 …hws[IMX6QDL_CLK_LVDS1_IN] = imx_clk_hw_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT… in imx6q_clocks_init()