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/linux/arch/powerpc/platforms/44x/
H A Dppc44x_simple.c49 "amcc,arches",
50 "amcc,bamboo",
52 "amcc,glacier",
54 "amcc,eiger",
55 "amcc,katmai",
56 "amcc,rainier",
57 "amcc,redwood",
58 "amcc,sequoia",
59 "amcc,taishan",
60 "amcc,yosemite",
H A DKconfig55 This option enables support for the AMCC PPC440EPX evaluation board.
64 This option enables support for the AMCC PPC440GX "Taishan"
76 This option enables support for the AMCC PPC440SPe evaluation board.
85 This option enables support for the AMCC PPC440GRX evaluation board.
107 This option enables support for the AMCC Dual PPC460GT evaluation board.
119 This option enables support for the AMCC PPC460EX evaluation board.
131 This option enables support for the AMCC PPC460GT evaluation board.
142 This option enables support for the AMCC PPC460SX Redwood board.
153 This option enables support for the AMCC PPC460SX evaluation board.
162 This option enables support for the AMCC PPC440EP evaluation board.
[all …]
H A Dcanyonlands.c56 np = of_find_compatible_node(NULL, NULL, "amcc,ppc460ex-bcsr"); in ppc460ex_canyonlands_fixup()
58 printk(KERN_ERR "failed did not find amcc, ppc460ex bcsr node\n"); in ppc460ex_canyonlands_fixup()
111 .compatible = "amcc,canyonlands", in define_machine()
/linux/drivers/comedi/drivers/
H A Damcc_s5933.h3 * Stuff for AMCC S5933 PCI Controller
7 * Inspirated from general-purpose AMCC S5933 PCI Matchmaker driver
10 * Thanks to AMCC for their on-line documentation and bus master DMA
18 /* AMCC Operation Register Offsets - PCI */
46 /* AMCC - PCI Interrupt Control/Status Register */
60 /* AMCC - PCI non-volatile ram command register (byte 3 of AMCC_OP_REG_MCSR) */
71 /* AMCC Operation Registers Size - PCI */
77 /* AMCC Operation Register Offsets - Add-on */
100 /* AMCC - Add-on General Control/Status Register */
131 /* AMCC - Add-on Interrupt Control/Status Register */
H A Daddi_apci_3120.c22 * PCI BAR 0 register map (devpriv->amcc)
144 unsigned long amcc; member
162 /* 16-bit interface for AMCC add-on registers */ in apci3120_addon_write()
176 /* AMCC - enable transfer count and reset A2P FIFO */ in apci3120_init_dma()
178 devpriv->amcc + AMCC_OP_REG_AGCSTS); in apci3120_init_dma()
184 /* AMCC - enable transfers and reset A2P flags */ in apci3120_init_dma()
186 devpriv->amcc + AMCC_OP_REG_MCSR); in apci3120_init_dma()
194 /* AMCC - enable write complete (DMA) and set FIFO advance */ in apci3120_init_dma()
196 devpriv->amcc + AMCC_OP_REG_INTCSR); in apci3120_init_dma()
436 nbytes = dmabuf->use_size - inl(devpriv->amcc + AMCC_OP_REG_MWTC); in apci3120_interrupt_dma()
[all …]
H A Daddi_apci_3501.c64 * AMCC S5933 NVRAM
84 unsigned long amcc; member
234 nfuncs = apci3501_eeprom_readw(devpriv->amcc, 10) & 0xff; in apci3501_eeprom_get_ao_n_chan()
243 func = apci3501_eeprom_readw(devpriv->amcc, 12 + offset) & 0x3f; in apci3501_eeprom_get_ao_n_chan()
244 addr = apci3501_eeprom_readw(devpriv->amcc, 14 + offset); in apci3501_eeprom_get_ao_n_chan()
247 val = apci3501_eeprom_readw(devpriv->amcc, addr + 10); in apci3501_eeprom_get_ao_n_chan()
266 val = apci3501_eeprom_readw(devpriv->amcc, 2 * addr); in apci3501_eeprom_insn_read()
321 devpriv->amcc = pci_resource_start(pcidev, 0); in apci3501_auto_attach()
H A Dcb_pcidas.c17 * with the AMCC S5933 PCI controller
295 unsigned long amcc; /* pcibar0 */ member
475 status = inb(devpriv->amcc + AMCC_OP_REG_MCSR_NVCMD); in cb_pcidas_eeprom_ready()
499 devpriv->amcc + AMCC_OP_REG_MCSR_NVCMD); in cb_pcidas_eeprom_insn_read()
500 outb(chan & 0xff, devpriv->amcc + AMCC_OP_REG_MCSR_NVDATA); in cb_pcidas_eeprom_insn_read()
502 devpriv->amcc + AMCC_OP_REG_MCSR_NVCMD); in cb_pcidas_eeprom_insn_read()
504 devpriv->amcc + AMCC_OP_REG_MCSR_NVDATA); in cb_pcidas_eeprom_insn_read()
506 devpriv->amcc + AMCC_OP_REG_MCSR_NVCMD); in cb_pcidas_eeprom_insn_read()
513 data[i] = inb(devpriv->amcc + AMCC_OP_REG_MCSR_NVDATA); in cb_pcidas_eeprom_insn_read()
1213 amcc_status = inl(devpriv->amcc + AMCC_OP_REG_INTCSR); in cb_pcidas_interrupt()
[all …]
H A Daddi_apci_1500.c23 * PCI Bar 0 Register map (devpriv->amcc)
44 unsigned long amcc; member
214 val = inl(devpriv->amcc + AMCC_OP_REG_INTCSR); in apci1500_interrupt()
779 devpriv->amcc = pci_resource_start(pcidev, 0); in apci1500_auto_attach()
839 devpriv->amcc + AMCC_OP_REG_INTCSR); in apci1500_auto_attach()
840 inl(devpriv->amcc + AMCC_OP_REG_IMB1); in apci1500_auto_attach()
841 inl(devpriv->amcc + AMCC_OP_REG_INTCSR); in apci1500_auto_attach()
843 devpriv->amcc + AMCC_OP_REG_INTCSR); in apci1500_auto_attach()
853 if (devpriv->amcc) in apci1500_detach()
854 outl(0x0, devpriv->amcc + AMCC_OP_REG_INTCSR); in apci1500_detach()
/linux/Documentation/devicetree/bindings/
H A Dincomplete-devices.yaml154 - amcc,ppc440epx-rng
155 - amcc,ppc460ex-bcsr
156 - amcc,ppc460ex-crypto
157 - amcc,ppc460ex-rng
158 - amcc,ppc460sx-crypto
159 - amcc,ppc4xx-crypto
160 - amcc,sata-460ex
/linux/arch/powerpc/boot/dts/
H A Darches.dts3 * Device Tree Source for AMCC Arches (dual 460GT board)
6 * Victor Gallardo <vgallardo@amcc.com>
7 * Adam Graham <agraham@amcc.com>
22 model = "amcc,arches";
23 compatible = "amcc,arches";
137 compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
H A Dsequoia.dts2 * Device Tree Source for AMCC Sequoia
20 model = "amcc,sequoia";
21 compatible = "amcc,sequoia";
114 compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto";
121 compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng";
H A Dcanyonlands.dts2 * Device Tree Source for AMCC Canyonlands (460EX)
16 model = "amcc,canyonlands";
17 compatible = "amcc,canyonlands";
140 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
147 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng";
181 compatible = "amcc,dwc-otg";
202 compatible = "amcc,sata-460ex";
264 compatible = "amcc,ppc460ex-bcsr";
H A Dredwood.dts2 * Device Tree Source for AMCC Redwood(460SX)
4 * Copyright 2008 AMCC <tmarri@amcc.com>
16 model = "amcc,redwood";
17 compatible = "amcc,redwood";
H A Dglacier.dts2 * Device Tree Source for AMCC Glacier (460GT)
16 model = "amcc,glacier";
17 compatible = "amcc,glacier";
133 compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto",
134 "amcc,ppc4xx-crypto";
141 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng";
H A Deiger.dts2 * Device Tree Source for AMCC (AppliedMicro) Eiger(460SX)
4 * Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com>
16 model = "amcc,eiger";
17 compatible = "amcc,eiger";
H A Dyosemite.dts2 * Device Tree Source for AMCC Yosemite
17 model = "amcc,yosemite";
18 compatible = "amcc,yosemite";
240 compatible = "amcc,spi-440ep";
H A Dbamboo.dts2 * Device Tree Source for AMCC Bamboo
19 model = "amcc,bamboo";
20 compatible = "amcc,bamboo";
H A Drainier.dts2 * Device Tree Source for AMCC Rainier
20 model = "amcc,rainier";
21 compatible = "amcc,rainier";
H A Dkatmai.dts2 * Device Tree Source for AMCC Katmai eval board
20 model = "amcc,katmai";
21 compatible = "amcc,katmai";
482 compatible = "amcc,xor-accelerator";
/linux/drivers/crypto/amcc/
H A Dcrypto4xx_trng.h3 * AMCC SoC PPC4xx Crypto Driver
6 * All rights reserved. James Hsiao <jhsiao@amcc.com>
H A Dcrypto4xx_core.h3 * AMCC SoC PPC4xx Crypto Driver
6 * All rights reserved. James Hsiao <jhsiao@amcc.com>
8 * This is the header file for AMCC Crypto offload Linux device driver for
H A Dcrypto4xx_trng.c66 { .compatible = "amcc,ppc460ex-rng", },
67 { .compatible = "amcc,ppc440epx-rng", },
H A Dcrypto4xx_reg_def.h3 * AMCC SoC PPC4xx Crypto Driver
6 * All rights reserved. James Hsiao <jhsiao@amcc.com>
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
/linux/Documentation/devicetree/bindings/gpio/
H A Dibm,ppc4xx-gpio.txt1 * IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs

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