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/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,pruss-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PRU-ICSS Local Interrupt Controller
10 - Suman Anna <s-anna@ti.com>
13 Each PRU-ICSS has a single interrupt controller instance that is common
14 to all the PRU cores. Most interrupt controllers can route 64 input events
18 interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
22 The property "ti,irqs-reserved" is used for denoting the connection
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI Programmable Realtime Unit (PRU) cores
10 - Suman Anna <s-anna@ti.com>
13 Each Programmable Real-Time Unit and Industrial Communication Subsystem
14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called
15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU
17 use the Data RAMs present within the PRU-ICSS for code execution.
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/linux/arch/arm/boot/dts/ti/omap/
H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
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/linux/drivers/soc/ti/
H A Dpruss.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS platform driver for various TI SoCs
5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/
7 * Suman Anna <s-anna@ti.com>
9 * Tero Kristo <t-krist
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/linux/drivers/remoteproc/
H A Dpru_rproc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PRU-ICSS remoteproc driver for various TI SoCs
5 * Copyright (C) 2014-2022 Texas Instruments Incorporated - https://www.ti.com/
8 * Suman Anna <s-anna@ti.com>
11 * Puranjay Mohan <p-mohan@ti.com>
41 /* CTRL register bit-fields */
53 /* PRU/RTU/Tx_PRU Core IRAM address masks */
62 /* PRU device addresses for various type of PRU RAMs */
71 * enum pru_iomem - PRU core memory/register range identifiers
73 * @PRU_IOMEM_IRAM: PRU Instruction RAM range
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