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Searched +full:ahci +full:- +full:glue (Results 1 – 13 of 13) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/soc/socionext/
H A Dsocionext,uniphier-ahci-glue.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC AHCI glue layer
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
14 logic handling signals to AHCI host controller inside AHCI component.
19 - enum:
20 - socionext,uniphier-pro4-ahci-glue
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/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Duniphier-reset.txt1 UniPhier glue reset controller
4 Peripheral core reset in glue layer
5 -----------------------------------
7 Some peripheral core reset belongs to its own glue layer. Before using
12 - compatible: Should be
13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3
14 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB3
15 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3
16 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3
17 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3
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H A Dsocionext,uniphier-glue-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral core reset in glue layer
10 Some peripheral core reset belongs to its own glue layer. Before using
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-reset
22 - socionext,uniphier-pro5-usb3-reset
23 - socionext,uniphier-pxs2-usb3-reset
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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dahci-platform.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AHCI SATA Controller
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
13 It is possible, but not required, to represent each port as a sub-node.
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
26 - brcm,iproc-ahci
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/freebsd/sys/contrib/device-tree/src/arm/socionext/
H A Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
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H A Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs2";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/
H A Dsata-uctl.txt1 * UCTL SATA controller glue
4 and the SATA AHCI host controller (UAHC). It performs the following functions:
5 - provides interfaces for the applications to access the UAHC AHCI
7 - provides a bridge for UAHC to fetch AHCI command table entries and data
9 - posts interrupts to the CIU.
10 - contains registers that:
11 - control the behavior of the UAHC
12 - control the clock/reset generation to UAHC
13 - control endian swapping for all UAHC registers and DMA accesses
17 - compatible: "cavium,octeon-7130-sata-uctl"
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/freebsd/share/man/man4/man4.arm/
H A Dimx6_ahci.431 .Nd device driver for the NXP i.MX6 on-chip SATA controller
36 .Bd -ragged -offset indent
37 .Cd "device ahci"
43 .Bd -literal -offset indent
50 support for the on-chip SATA controller found on some models of
52 The driver is a thin glue layer to interpret the platform's FDT
54 .Xr ahci 4
57 .Xr ahci 4 ,
/freebsd/sys/contrib/device-tree/src/arm64/socionext/
H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-binding
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstih407-family.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 reserved-memory {
16 #address-cells = <1>;
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/freebsd/sys/conf/
H A DNOTES2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
11 # Please use ``make LINT'' to create an old-style LINT file if you want to
12 # do kernel test-builds.
48 # auto-size based on physical memory.
66 # after most other flags. Here we use it to inhibit use of non-optimal
67 # gcc built-in functions (e.g., memcmp).
70 # The following is equivalent to 'config -g KERNELNAME' and creates
71 # 'kernel.debug' compiled with -g debugging as well as a normal
81 makeoptions CONF_CFLAGS=-fno-builtin #Don't allow use of memcmp, etc.
82 #makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2024-11-25 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
40 7a08 SATA AHCI Controller
41 7a09 PCI-to-PCI Bridge
49 7a18 SATA 3 AHCI Controller
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