Searched +full:agilex +full:- +full:clkmgr (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | intel,agilex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/intel,agilex.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel SoCFPGA Agilex platform clock controller
10 - Dinh Nguyen <dinguyen@kernel.org>
13 The Intel Agilex Clock controller is an integrated clock controller, which
18 const: intel,agilex-clkmgr
20 '#clock-cells':
30 - compatible
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| /linux/arch/arm64/boot/dts/intel/ |
| H A D | socfpga_n5x_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
29 sdram_edac: memory-controller@f87f8000 {
30 compatible = "snps,ddrc-3.80a";
37 &clkmgr {
38 compatible = "intel,easic-n5x-clkmgr";
43 phy-mode = "rgmii";
44 phy-handle = <&phy0>;
46 max-frame-size = <9000>;
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| /linux/drivers/clk/socfpga/ |
| H A D | clk-agilex.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
10 #include <dt-bindings/clock/agilex-clock.h>
12 #include "stratix10-clk.h"
17 { .fw_name = "cb-intosc-hs-div2-clk",
18 .name = "cb-intosc-hs-div2-clk", },
19 { .fw_name = "f2s-free-clk",
20 .name = "f2s-free-clk", },
26 { .fw_name = "cb-intosc-hs-div2-clk",
27 .name = "cb-intosc-hs-div2-clk", },
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