1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Qualcomm eDP PHY 9 10maintainers: 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 13description: 14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides 15 the physical interface for Embedded Display Port. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,sa8775p-edp-phy 22 - qcom,sc7280-edp-phy 23 - qcom,sc8180x-edp-phy 24 - qcom,sc8280xp-dp-phy 25 - qcom,sc8280xp-edp-phy 26 - qcom,x1e80100-dp-phy 27 - items: 28 - enum: 29 - qcom,qcs8300-edp-phy 30 - const: qcom,sa8775p-edp-phy 31 32 reg: 33 items: 34 - description: PHY base register block 35 - description: tx0 register block 36 - description: tx1 register block 37 - description: PLL register block 38 39 clocks: 40 maxItems: 2 41 42 clock-names: 43 items: 44 - const: aux 45 - const: cfg_ahb 46 47 "#clock-cells": 48 const: 1 49 50 "#phy-cells": 51 const: 0 52 53 power-domains: 54 maxItems: 1 55 56 vdda-phy-supply: true 57 vdda-pll-supply: true 58 59required: 60 - compatible 61 - reg 62 - clocks 63 - clock-names 64 - "#clock-cells" 65 - "#phy-cells" 66 67additionalProperties: false 68 69examples: 70 - | 71 phy@aec2a00 { 72 compatible = "qcom,sc8180x-edp-phy"; 73 reg = <0x0aec2a00 0x1c0>, 74 <0x0aec2200 0xa0>, 75 <0x0aec2600 0xa0>, 76 <0x0aec2000 0x19c>; 77 78 clocks = <&dispcc 0>, <&dispcc 1>; 79 clock-names = "aux", "cfg_ahb"; 80 81 #clock-cells = <1>; 82 #phy-cells = <0>; 83 84 vdda-phy-supply = <&vdd_a_edp_0_1p2>; 85 vdda-pll-supply = <&vdd_a_edp_0_0p9>; 86 }; 87... 88