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/linux/drivers/dma/
H A Dacpi-dma.c35 * @adma: struct acpi_dma of the given DMA controller
45 struct acpi_device *adev, struct acpi_dma *adma) in acpi_dma_parse_resource_group() argument
107 adma->base_request_line = si->base_request_line; in acpi_dma_parse_resource_group()
108 adma->end_request_line = si->base_request_line + in acpi_dma_parse_resource_group()
112 adma->base_request_line, adma->end_request_line); in acpi_dma_parse_resource_group()
120 * @adma: struct acpi_dma of the given DMA controller
130 static void acpi_dma_parse_csrt(struct acpi_device *adev, struct acpi_dma *adma) in acpi_dma_parse_csrt() argument
149 ret = acpi_dma_parse_resource_group(grp, adev, adma); in acpi_dma_parse_csrt()
182 struct acpi_dma *adma; in acpi_dma_controller_register() local
192 adma = kzalloc_obj(*adma); in acpi_dma_controller_register()
[all …]
H A Dtegra210-adma.c3 * ADMA driver for Nvidia's Tegra210 ADMA controller.
105 * @max_page: Maximum ADMA Channel Page.
134 * struct tegra_adma_chan_regs - Tegra ADMA channel registers
148 * struct tegra_adma_desc - Tegra ADMA descriptor to manage transfer requests.
159 * struct tegra_adma_chan - Tegra ADMA channel information
184 * struct tegra_adma - Tegra ADMA controller information
326 /* Enable global ADMA registers */ in tegra_adma_init()
419 /* Disable ADMA */ in tegra_adma_stop()
482 /* Start ADMA */ in tegra_adma_start()
713 * ADMA channel. in tegra_adma_set_xfer_params()
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H A Dmmp_tdma.c49 #define TDCR_PACKMOD (0x1 << 16) /* Pack Mode (ADMA Only) */
628 { .compatible = "marvell,adma-1.0", .data = (void *)MMP_AUD_TDMA},
/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml133 dmas = <&adma 1>, <&adma 1>,
134 <&adma 2>, <&adma 2>,
135 <&adma 3>, <&adma 3>,
136 <&adma 4>, <&adma 4>,
137 <&adma 5>, <&adma 5>,
138 <&adma 6>, <&adma 6>,
139 <&adma 7>, <&adma 7>,
140 <&adma 8>, <&adma 8>,
141 <&adma 9>, <&adma 9>,
142 <&adma 10>, <&adma 10>;
H A Dnvidia,tegra210-ahub.yaml13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
150 dmas = <&adma 1>, <&adma 1>,
151 <&adma 2>, <&adma 2>,
152 <&adma 3>, <&adma 3>,
153 <&adma 4>, <&adma 4>,
154 <&adma 5>, <&adma 5>,
155 <&adma 6>, <&adma 6>,
156 <&adma 7>, <&adma 7>,
157 <&adma 8>, <&adma 8>,
158 <&adma 9>, <&adma 9>,
[all …]
/linux/drivers/ata/
H A Dpdc_adma.c3 * pdc_adma.c - Pacific Digital Corporation ADMA
12 * Supports ATA disks in single-packet ADMA mode.
15 * TODO: Use ADMA transfers for ATAPI devices, when possible.
36 /* macro to calculate base address for ADMA regs */
57 ADMA_CONTROL = 0x0000, /* ADMA control */
58 ADMA_STATUS = 0x0002, /* ADMA status */
69 aRSTADM = (1 << 5), /* ADMA logic reset */
104 board_1841_idx = 0, /* ADMA 2-port controller */
181 /* reset ADMA to idle state */ in adma_reset_engine()
197 /* reset the ADMA engine */ in adma_reinit_engine()
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H A Dsata_nv.c18 * similar to the ADMA specification (with some modifications).
91 /* BAR5 offset to ADMA general registers */
96 /* BAR5 offset to ADMA ports */
99 /* size of ADMA port register space */
102 /* ADMA port registers */
188 /* ADMA Physical Region Descriptor - one SG segment */
207 /* ADMA Command Parameter Block
341 ADMA, enumerator
559 /* ADMA */
615 ata_port_warn(ap, "timeout waiting for ADMA IDLE, stat=0x%hx\n", in nv_adma_register_mode()
[all …]
H A Dsata_inic162x.c35 * show how to use the IDMA (ADMA + some initio specific twists)
154 IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */
155 IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */
156 IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */
157 IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */
158 IDMA_STAT_PSD = (1 << 6), /* ADMA pause */
159 IDMA_STAT_DONE = (1 << 7), /* ADMA done */
548 /* fire up the ADMA engine */ in inic_qc_issue()
/linux/include/linux/platform_data/
H A Ddma-iop32x.h25 * struct iop_adma_device - internal representation of an ADMA device
27 * @id: HW ADMA Device selector
41 * struct iop_adma_chan - internal representation of an ADMA device
67 * struct iop_adma_desc_slot - IOP-ADMA software descriptor
/linux/drivers/dma/ppc4xx/
H A Dadma.h46 * struct ppc440spe_adma_device - internal representation of an ADMA device
51 * @id: HW ADMA Device selector
74 * struct ppc440spe_adma_chan - internal representation of an ADMA channel
119 * struct ppc440spe_adma_desc_slot - PPC440SPE-ADMA software descriptor
H A Dadma.c15 * ADMA driver written by D.Williams.
34 #include "adma.h"
71 /* The list of channels exported by ppc440spe ADMA */
348 * this slot will be pasted from ADMA level in ppc440spe_desc_init_dma01pq()
483 * this slot will be pasted from ADMA level in ppc440spe_desc_init_dma01pqzero_sum()
886 * ADMA channel low-level routines
1218 * ADMA device level
1339 /* In the current implementation of ppc440spe ADMA driver it in ppc440spe_adma_estimate()
1541 dev_dbg(chan->device->common.dev, "ppc440spe adma%d: %s\n", in __ppc440spe_adma_slot_cleanup()
1786 printk(KERN_INFO "SPE ADMA Channel only initialized" in ppc440spe_adma_alloc_chan_resources()
[all …]
H A DMakefile2 obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += adma.o
/linux/sound/soc/tegra/
H A DKconfig127 Config to enable ADMAIF which is the interface between ADMA and
128 Audio Hub (AHUB). Each ADMA channel that sends/receives data to/
129 from AHUB must interface through an ADMAIF channel. ADMA channel
131 ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
H A Dtegra_isomgr_bw.c5 // ADMA bandwidth calculation
129 MODULE_DESCRIPTION("Tegra ADMA Bandwidth Request driver");
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt3 Device nodes needed for operation of the ppc440spe-adma driver
6 by ADMA driver for configuration of RAID-6 H/W capabilities of
/linux/Documentation/devicetree/bindings/mfd/
H A Dsamsung,exynos5433-lpass.yaml90 dmas = <&adma 0>, <&adma 2>;
/linux/Documentation/devicetree/bindings/dma/
H A Dmarvell,mmp-dma.yaml19 - marvell,adma-1.0
/linux/Documentation/devicetree/bindings/dma/xilinx/
H A Dxlnx,zynqmp-dma-1.0.yaml32 description: memory map for gdma/adma module access
/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h50 /* ADMA SS */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp.dtsi342 #include "imx8-ss-adma.dtsi"
352 #include "imx8qxp-ss-adma.dtsi"
/linux/Documentation/devicetree/bindings/clock/
H A Dimx8qxp-lpcg.yaml35 - fsl,imx8qxp-lpcg-adma
/linux/include/dt-bindings/clock/
H A Dimx8-clock.h118 /* ADMA SS LPCG */
/linux/drivers/mmc/host/
H A Dsdhci.c100 SDHCI_DUMP("ADMA Err: 0x%08x | ADMA Ptr: 0x%08x%08x\n", in sdhci_dumpregs()
105 SDHCI_DUMP("ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", in sdhci_dumpregs()
329 * is ADMA. in sdhci_config_dma()
343 * ADMA can support 64-bit addressing. in sdhci_config_dma()
779 * The SDHCI specification states that ADMA addresses must in sdhci_adma_table_pre()
809 * multiple descriptors, noting that the ADMA table is sized in sdhci_adma_table_pre()
3490 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3493 sdhci_err_stats_inc(host, ADMA); in sdhci_data_irq()
4031 sdhci_err_stats_inc(host, ADMA); in sdhci_cqe_irq()
4337 DBG("Disabling ADMA as it is marked broken\n"); in sdhci_setup_host()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dmmp2.dtsi210 compatible = "marvell,adma-1.0";
220 compatible = "marvell,adma-1.0";
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi541 adma: dma-controller@3880000 { label
598 dmas = <&adma 0>,
599 <&adma 2>,
600 <&adma 1>;

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