/linux/Documentation/devicetree/bindings/sound/ |
H A D | nvidia,tegra210-admaif.yaml | 10 ADMAIF is the interface between ADMA and AHUB. Each ADMA channel 12 ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF 13 Tx channel and ADMA channel receiving data from AHUB pairs with 107 dmas = <&adma 1>, <&adma 1>, 108 <&adma 2>, <&adma 2>, 109 <&adma 3>, <&adma 3>, 110 <&adma 4>, <&adma 4>, 111 <&adma 5>, <&adma 5>, 112 <&adma 6>, <&adma 6>, 113 <&adma 7>, <&adma 7>, [all …]
|
H A D | nvidia,tegra-audio-graph-card.yaml | 131 dmas = <&adma 1>, <&adma 1>, 132 <&adma 2>, <&adma 2>, 133 <&adma 3>, <&adma 3>, 134 <&adma 4>, <&adma 4>, 135 <&adma 5>, <&adma 5>, 136 <&adma 6>, <&adma 6>, 137 <&adma 7>, <&adma 7>, 138 <&adma 8>, <&adma 8>, 139 <&adma 9>, <&adma 9>, 140 <&adma 10>, <&adma 10>;
|
H A D | nvidia,tegra210-ahub.yaml | 13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA 149 dmas = <&adma 1>, <&adma 1>, 150 <&adma 2>, <&adma 2>, 151 <&adma 3>, <&adma 3>, 152 <&adma 4>, <&adma 4>, 153 <&adma 5>, <&adma 5>, 154 <&adma 6>, <&adma 6>, 155 <&adma 7>, <&adma 7>, 156 <&adma 8>, <&adma 8>, 157 <&adma 9>, <&adma 9>, [all …]
|
/linux/Documentation/devicetree/bindings/dma/ |
H A D | nvidia,tegra210-adma.yaml | 4 $id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml# 7 title: NVIDIA Tegra Audio DMA (ADMA) controller 20 - nvidia,tegra210-adma 21 - nvidia,tegra186-adma 24 - nvidia,tegra234-adma 25 - nvidia,tegra194-adma 26 - const: nvidia,tegra186-adma 51 description: Must contain one entry for the ADMA module clock 82 - nvidia,tegra210-adma 94 - nvidia,tegra186-adma [all...] |
H A D | marvell,mmp-dma.yaml | 19 - marvell,adma-1.0
|
/linux/drivers/ata/ |
H A D | pdc_adma.c | 3 * pdc_adma.c - Pacific Digital Corporation ADMA 12 * Supports ATA disks in single-packet ADMA mode. 15 * TODO: Use ADMA transfers for ATAPI devices, when possible. 36 /* macro to calculate base address for ADMA regs */ 57 ADMA_CONTROL = 0x0000, /* ADMA control */ 58 ADMA_STATUS = 0x0002, /* ADMA status */ 69 aRSTADM = (1 << 5), /* ADMA logic reset */ 104 board_1841_idx = 0, /* ADMA 2-port controller */ 181 /* reset ADMA to idle state */ in adma_reset_engine() 197 /* reset the ADMA engine */ in adma_reinit_engine() [all …]
|
H A D | sata_nv.c | 18 * similar to the ADMA specification (with some modifications). 91 /* BAR5 offset to ADMA general registers */ 96 /* BAR5 offset to ADMA ports */ 99 /* size of ADMA port register space */ 102 /* ADMA port registers */ 188 /* ADMA Physical Region Descriptor - one SG segment */ 207 /* ADMA Command Parameter Block 341 ADMA, enumerator 559 /* ADMA */ 615 ata_port_warn(ap, "timeout waiting for ADMA IDLE, stat=0x%hx\n", in nv_adma_register_mode() [all …]
|
H A D | sata_inic162x.c | 35 * show how to use the IDMA (ADMA + some initio specific twists) 154 IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */ 155 IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */ 156 IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */ 157 IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */ 158 IDMA_STAT_PSD = (1 << 6), /* ADMA pause */ 159 IDMA_STAT_DONE = (1 << 7), /* ADMA done */ 548 /* fire up the ADMA engine */ in inic_qc_issue()
|
/linux/drivers/dma/ |
H A D | tegra210-adma.c | 3 * ADMA driver for Nvidia's Tegra210 ADMA controller. 86 * @max_page: Maximum ADMA Channel Page. 110 * struct tegra_adma_chan_regs - Tegra ADMA channel registers 123 * struct tegra_adma_desc - Tegra ADMA descriptor to manage transfer requests. 134 * struct tegra_adma_chan - Tegra ADMA channel information 156 * struct tegra_adma - Tegra ADMA controller information 275 /* Enable global ADMA registers */ in tegra_adma_init() 368 /* Disable ADMA */ in tegra_adma_stop() 414 /* Start ADMA */ in tegra_adma_start() 641 * ADMA channel. in tegra_adma_set_xfer_params() [all …]
|
/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra186.dtsi | 447 dmas = <&adma 1>, <&adma 1>, 448 <&adma 2>, <&adma 2>, 449 <&adma 3>, <&adma 3>, 450 <&adma 4>, <&adma 4>, 451 <&adma 5>, <&adma 5>, 452 <&adma 6>, <&adma 6>, 453 <&adma 7>, <&adma 7>, 454 <&adma 8>, <&adma 8>, 455 <&adma 9>, <&adma 9>, 456 <&adma 10>, <&adma 10>, [all …]
|
H A D | tegra194.dtsi | 548 dmas = <&adma 1>, <&adma 1>, 549 <&adma 2>, <&adma 2>, 550 <&adma 3>, <&adma 3>, 551 <&adma 4>, <&adma 4>, 552 <&adma 5>, <&adma 5>, 553 <&adma 6>, <&adma 6>, 554 <&adma 7>, <&adma 7>, 555 <&adma 8>, <&adma 8>, 556 <&adma 9>, <&adma 9>, 557 <&adma 10>, <&adma 10>, [all …]
|
/linux/include/linux/platform_data/ |
H A D | dma-iop32x.h | 25 * struct iop_adma_device - internal representation of an ADMA device 27 * @id: HW ADMA Device selector 41 * struct iop_adma_chan - internal representation of an ADMA device 67 * struct iop_adma_desc_slot - IOP-ADMA software descriptor
|
/linux/drivers/dma/ppc4xx/ |
H A D | adma.h | 46 * struct ppc440spe_adma_device - internal representation of an ADMA device 51 * @id: HW ADMA Device selector 74 * struct ppc440spe_adma_chan - internal representation of an ADMA channel 119 * struct ppc440spe_adma_desc_slot - PPC440SPE-ADMA software descriptor
|
H A D | Makefile | 2 obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += adma.o
|
/linux/sound/soc/tegra/ |
H A D | Kconfig | 125 Config to enable ADMAIF which is the interface between ADMA and 126 Audio Hub (AHUB). Each ADMA channel that sends/receives data to/ 127 from AHUB must interface through an ADMAIF channel. ADMA channel 129 ADMA channel receiving data from AHUB pairs with an ADMAIF Rx
|
/linux/Documentation/devicetree/bindings/powerpc/4xx/ |
H A D | ppc440spe-adma.txt | 3 Device nodes needed for operation of the ppc440spe-adma driver 6 by ADMA driver for configuration of RAID-6 H/W capabilities of
|
/linux/Documentation/devicetree/bindings/mfd/ |
H A D | samsung,exynos5433-lpass.yaml | 90 dmas = <&adma 0>, <&adma 2>;
|
/linux/Documentation/devicetree/bindings/dma/xilinx/ |
H A D | xlnx,zynqmp-dma-1.0.yaml | 32 description: memory map for gdma/adma module access
|
/linux/drivers/clk/imx/ |
H A D | clk-imx8qxp-lpcg.h | 50 /* ADMA SS */
|
/linux/include/dt-bindings/clock/ |
H A D | xlnx-versal-clk.h | 90 #define ADMA 81 macro
|
H A D | imx8-clock.h | 118 /* ADMA SS LPCG */
|
/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx8qxp-lpcg.yaml | 35 - fsl,imx8qxp-lpcg-adma
|
/linux/arch/arm/boot/dts/marvell/ |
H A D | mmp2.dtsi | 210 compatible = "marvell,adma-1.0"; 220 compatible = "marvell,adma-1.0";
|
/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5420.dtsi | 541 adma: dma-controller@3880000 { label 598 dmas = <&adma 0>, 599 <&adma 2>, 600 <&adma 1>;
|
/linux/drivers/clk/samsung/ |
H A D | clk-exynos-audss.c | 235 clk_table[EXYNOS_ADMA] = clk_hw_register_gate(dev, "adma", in exynos_audss_clk_probe()
|