xref: /linux/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml (revision 13845bdc869f136f92ad3d40ea09b867bb4ce467) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/imu/adi,adis16480.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices ADIS16480 and similar IMUs
8
9maintainers:
10  - Alexandru Tachici <alexandru.tachici@analog.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - adi,adis16375
17          - adi,adis16480
18          - adi,adis16485
19          - adi,adis16486
20          - adi,adis16488
21          - adi,adis16489
22          - adi,adis16490
23          - adi,adis16495-1
24          - adi,adis16495-2
25          - adi,adis16495-3
26          - adi,adis16497-1
27          - adi,adis16497-2
28          - adi,adis16497-3
29          - adi,adis16545-1
30          - adi,adis16545-2
31          - adi,adis16545-3
32          - adi,adis16547-1
33          - adi,adis16547-2
34          - adi,adis16547-3
35      - items:
36          - const: adi,adis16487
37          - const: adi,adis16485
38
39  reg:
40    maxItems: 1
41
42  interrupts:
43    minItems: 1
44    maxItems: 2
45    description: |
46      Accepted interrupt types are:
47      * IRQ_TYPE_EDGE_RISING
48      * IRQ_TYPE_EDGE_FALLING
49
50  interrupt-names:
51    minItems: 1
52    maxItems: 2
53    description:
54      Default if not supplied is DIO1.
55    items:
56      enum:
57        - DIO1
58        - DIO2
59        - DIO3
60        - DIO4
61
62  spi-cpha: true
63  spi-cpol: true
64
65  reset-gpios:
66    maxItems: 1
67    description: Connected to RESET pin which is active low.
68
69  clocks:
70    maxItems: 1
71    description: If not provided, then the internal clock is used.
72
73  clock-names:
74    description: |
75      sync: In sync mode, the internal clock is disabled and the frequency
76            of the external clock signal establishes therate of data
77            collection and processing. See Fig 14 and 15 in the datasheet.
78            The clock-frequency must be:
79            * 3000 to 4500 Hz for adis1649x devices.
80            * 700 to 2400 Hz for adis1648x devices.
81      pps:  In Pulse Per Second (PPS) Mode, the rate of data collection and
82            production is equal to the product of the external clock
83            frequency and the scale factor in the SYNC_SCALE register, see
84            Table 154 in the datasheet.
85            The clock-frequency must be:
86            * 1 to 128 Hz for adis1649x devices.
87            * This mode is not supported by adis1648x devices.
88    enum:
89      - sync
90      - pps
91
92  adi,ext-clk-pin:
93    $ref: /schemas/types.yaml#/definitions/string
94    description: |
95      The DIOx line to be used as an external clock input.
96      Each DIOx pin supports only one function at a time (data ready line
97      selection or external clock input). When a single pin has two
98      two assignments, the enable bit for the lower priority function
99      automatically resets to zero (disabling the lower priority function).
100      Data ready has highest priority.
101      If not provided then DIO2 is assigned as default external clock
102      input pin.
103    enum:
104      - DIO1
105      - DIO2
106      - DIO3
107      - DIO4
108
109required:
110  - compatible
111  - reg
112  - interrupts
113  - spi-cpha
114  - spi-cpol
115  - spi-max-frequency
116
117allOf:
118  - $ref: /schemas/spi/spi-peripheral-props.yaml#
119
120unevaluatedProperties: false
121
122examples:
123  - |
124    #include <dt-bindings/interrupt-controller/irq.h>
125    spi {
126        #address-cells = <1>;
127        #size-cells = <0>;
128
129        imu@0 {
130            compatible = "adi,adis16495-1";
131            reg = <0>;
132            spi-max-frequency = <3200000>;
133            spi-cpol;
134            spi-cpha;
135            interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
136            interrupt-parent = <&gpio>;
137            interrupt-names = "DIO2";
138            clocks = <&adis16495_sync>;
139            clock-names = "sync";
140            adi,ext-clk-pin = "DIO1";
141        };
142    };
143...
144