Home
last modified time | relevance | path

Searched full:adc (Results 1 – 25 of 1253) sorted by relevance

12345678910>>...51

/linux/drivers/iio/adc/
H A Dpalmas_gpadc.c3 * palmas-adc.c -- TI PALMAS GPADC.
131 static struct palmas_adc_event *palmas_gpadc_get_event(struct palmas_gpadc *adc, in palmas_gpadc_get_event() argument
135 if (adc_chan == adc->event0.channel && dir == adc->event0.direction) in palmas_gpadc_get_event()
136 return &adc->event0; in palmas_gpadc_get_event()
138 if (adc_chan == adc->event1.channel && dir == adc->event1.direction) in palmas_gpadc_get_event()
139 return &adc->event1; in palmas_gpadc_get_event()
144 static bool palmas_gpadc_channel_is_freerunning(struct palmas_gpadc *adc, in palmas_gpadc_channel_is_freerunning() argument
147 return palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_RISING) || in palmas_gpadc_channel_is_freerunning()
148 palmas_gpadc_get_event(adc, adc_chan, IIO_EV_DIR_FALLING); in palmas_gpadc_channel_is_freerunning()
175 static int palmas_disable_auto_conversion(struct palmas_gpadc *adc) in palmas_disable_auto_conversion() argument
[all …]
H A Dimx93_adc.c3 * NXP i.MX93 ADC driver
21 #define IMX93_ADC_DRIVER_NAME "imx93-adc"
42 /* ADC bit shift */
63 /* ADC status */
104 static void imx93_adc_power_down(struct imx93_adc *adc) in imx93_adc_power_down() argument
109 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
111 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
113 ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr, in imx93_adc_power_down()
118 dev_warn(adc->dev, in imx93_adc_power_down()
119 "ADC do not in power down mode, current MSR is %x\n", in imx93_adc_power_down()
[all …]
H A Dstm32-adc.c3 * This file is part of STM32 ADC driver
31 #include "stm32-adc-core.h"
36 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
94 * struct stm32_adc_ic - ADC internal channels
112 * struct stm32_adc_trig_info - ADC trigger info
122 * struct stm32_adc_calib - optional adc calibration data
132 * struct stm32_adc_regs - stm32 ADC misc registers & bitfield desc
144 * struct stm32_adc_vrefint - stm32 ADC internal reference voltage data
212 * @smp_cycles: programmable sampling time (ADC clock cycles)
236 * struct stm32_adc - private data of each ADC IIO instance
[all …]
H A Dimx8qxp-adc.c3 * NXP i.MX8QXP ADC driver
29 #define ADC_DRIVER_NAME "imx8qxp-adc"
45 /* ADC bit shift */
74 /* ADC PARAMETER*/
96 /* Serialise ADC channel reads */
122 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
127 ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
129 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
132 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
136 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
[all …]
H A Dqcom-spmi-adc5-gen3.c18 #include <linux/iio/adc/qcom-adc5-gen3-common.h>
35 * struct adc5_channel_prop - ADC channel structure
36 * @common_props: structure with ADC channel properties (common to TM usage).
38 * @chip: pointer to top-level ADC device structure.
47 * struct adc5_chip - ADC private structure.
49 * @dev_data: Top-level ADC device data.
50 * @nchannels: number of ADC channels.
51 * @chan_props: array of ADC channel properties.
53 * @complete: ADC result notification after interrupt is received.
54 * @lock: ADC lock for access to the peripheral, to prevent concurrent
[all …]
H A Drzt2h_adc.c7 #include <linux/iio/adc-helpers.h>
48 static void rzt2h_adc_start(struct rzt2h_adc *adc, unsigned int conversion_type) in rzt2h_adc_start() argument
52 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
60 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_start()
63 static void rzt2h_adc_stop(struct rzt2h_adc *adc) in rzt2h_adc_stop() argument
67 reg = readw(adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
72 writew(reg, adc->base + RZT2H_ADCSR_REG); in rzt2h_adc_stop()
75 static int rzt2h_adc_read_single(struct rzt2h_adc *adc, unsigned int ch, int *val) in rzt2h_adc_read_single() argument
79 ret = pm_runtime_resume_and_get(adc->dev); in rzt2h_adc_read_single()
83 mutex_lock(&adc->lock); in rzt2h_adc_read_single()
[all …]
H A Drzg2l_adc.c14 #include <linux/iio/adc-helpers.h>
25 #define DRIVER_NAME "rzg2l-adc"
59 * struct rzg2l_adc_hw_params - ADC hardware specific parameters
60 * @default_adsmp: default ADC sampling period (see ADM3 register); index 0 is
62 * @adsmp_mask: ADC sampling period mask (see ADM3 register)
64 * @default_adcmp: default ADC cmp (see ADM3 register)
94 * struct rzg2l_adc_channel - ADC channel descriptor
95 * @name: ADC channel name
96 * @type: ADC channel type
115 static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg) in rzg2l_adc_readl() argument
[all …]
H A Dingenic-adc.c3 * ADC driver for the Ingenic JZ47xx SoCs
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
103 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
117 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
119 guard(mutex)(&adc->lock); in ingenic_adc_set_adcmd()
122 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
129 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
135 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
143 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
[all …]
H A Dmcp3911.c109 int (*config)(struct mcp3911 *adc, bool external_vref);
110 int (*get_osr)(struct mcp3911 *adc, u32 *val);
111 int (*set_osr)(struct mcp3911 *adc, u32 val);
112 int (*enable_offset)(struct mcp3911 *adc, bool enable);
113 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
114 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
115 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
116 int (*get_raw)(struct mcp3911 *adc, int channel, int *val);
136 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
140 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
[all …]
H A Dqcom-spmi-adc5.c10 #include <linux/iio/adc/qcom-vadc-common.h>
103 * struct adc5_channel_prop - ADC channel property.
112 * @avg_samples: ability to provide single result from the ADC
132 * struct adc5_chip - ADC private structure.
135 * @base: base address for the ADC peripheral.
136 * @nchannels: number of ADC channels.
137 * @chan_props: array of ADC channel properties.
140 * @complete: ADC result notification after interrupt is received.
141 * @lock: ADC lock for access to the peripheral.
157 static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len) in adc5_read() argument
[all …]
H A Dti-adc084s021.c5 * Driver for Texas Instruments' ADC084S021 ADC chip.
67 * adc084s021_adc_conversion() - Read an ADC channel and return its value.
69 * @adc: The ADC SPI data.
72 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
74 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
78 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
83 *(data + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
92 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local
101 ret = regulator_enable(adc->reg); in adc084s021_read_raw()
107 adc->tx_buf[0] = channel->channel << 3; in adc084s021_read_raw()
[all …]
H A Dlpc18xx_adc.c3 * IIO ADC driver for NXP LPC18xx ADC
25 /* LPC18XX ADC registers and bits */
68 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
73 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
74 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
76 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
79 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
90 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
94 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
95 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
[all …]
H A Dti-adc0832.c3 * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
32 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
119 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
121 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
124 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
131 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
134 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
137 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
139 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
140 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
[all …]
H A Dmcp320x.c8 * Driver for following ADC chips from Microchip Technology's:
71 * struct mcp320x - Microchip SPI ADC instance
73 * @msg: SPI message to select a channel and receive a value from the ADC
79 * @chip_info: ADC properties
119 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
124 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
125 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
129 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
130 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
133 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
[all …]
H A Dti-ads8344.c3 * ADS8344 16-bit 8-Channel ADC driver
26 * Lock protecting access to adc->tx_buff and rx_buff,
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
[all …]
H A Dqcom-pm8xxx-xoadc.c7 * specific-purpose and general purpose ADC converters and channels.
13 #include <linux/iio/adc/qcom-vadc-common.h>
26 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
28 * drivers/hwmon/pm8xxx-adc.c
56 /* Proper ADC registers */
98 * On a later ADC the decimation factors are defined as
166 * ADC code to the value that IIO expects, in uV or millicelsius
308 * include/linux/mfd/pm8xxx/pm8xxx-adc.h
370 * struct pm8xxx_chan_info - ADC channel information
417 struct pm8xxx_xoadc *adc = iio_priv(indio_dev); in pm8xxx_eoc_irq() local
[all …]
H A Dmcp3422.c88 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig) in mcp3422_update_config() argument
92 ret = i2c_master_send(adc->i2c, &newconfig, 1); in mcp3422_update_config()
94 adc->config = newconfig; in mcp3422_update_config()
101 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_read() argument
104 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config); in mcp3422_read()
109 ret = i2c_master_recv(adc->i2c, buf, 4); in mcp3422_read()
113 ret = i2c_master_recv(adc->i2c, buf, 3); in mcp3422_read()
123 static int mcp3422_read_channel(struct mcp3422 *adc, in mcp3422_read_channel() argument
130 mutex_lock(&adc->lock); in mcp3422_read_channel()
132 if (req_channel != FIELD_GET(MCP3422_CHANNEL_MASK, adc->config)) { in mcp3422_read_channel()
[all …]
H A Dmax1118.c70 struct max1118 *adc = iio_priv(indio_dev); in max1118_read() local
97 .rx_buf = &adc->data, in max1118_read()
104 ret = spi_sync_transfer(adc->spi, xfers + 1, 2); in max1118_read()
106 ret = spi_sync_transfer(adc->spi, xfers, 3); in max1118_read()
111 return adc->data; in max1118_read()
116 struct max1118 *adc = iio_priv(indio_dev); in max1118_get_vref_mV() local
117 const struct spi_device_id *id = spi_get_device_id(adc->spi); in max1118_get_vref_mV()
126 vref_uV = regulator_get_voltage(adc->reg); in max1118_get_vref_mV()
139 struct max1118 *adc = iio_priv(indio_dev); in max1118_read_raw() local
143 mutex_lock(&adc->lock); in max1118_read_raw()
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Datmel,sama9260-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
7 title: AT91 sama9260 and similar Analog to Digital Converter (ADC)
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
19 - atmel,at91sama5d3-adc
36 atmel,adc-channels-used:
40 atmel,adc-startup-time:
43 Startup Time of the ADC in microseconds as defined in the datasheet
[all …]
H A Dti,am3359-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml#
7 title: TI AM3359 ADC
16 - ti,am3359-adc
17 - ti,am4372-adc
20 - ti,am654-adc
21 - const: ti,am3359-adc
26 ti,adc-channels:
27 description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and
34 description: List of open delays for each channel of ADC in the order of
35 ti,adc-channels. The value corresponds to the number of ADC clock cycles
[all …]
H A Dingenic,adc.yaml5 $id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#
8 title: Ingenic JZ47xx ADC controller IIO
14 Industrial I/O subsystem bindings for ADC controller found in
17 ADC clients must use the format described in
19 giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
24 - ingenic,jz4725b-adc
25 - ingenic,jz4740-adc
26 - ingenic,jz4760-adc
27 - ingenic,jz4760b-adc
28 - ingenic,jz4770-adc
[all …]
H A Dst,stm32-dfsdm-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
85 - st,stm32-dfsdm-adc
95 st,adc-channels:
97 List of single-ended channels muxed for this ADC.
99 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
107 st,adc-channel-names:
129 st,adc-channel-types:
141 st,adc-channel-clk-src:
[all …]
/linux/drivers/hwmon/
H A Dadcxx.c11 * ADC<bb><c>S<sss>, where
18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
51 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
57 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
60 if (adc->channels == 1) { in adcxx_show()
76 value = value * adc->reference >> 12; in adcxx_show()
79 mutex_unlock(&adc->lock); in adcxx_show()
94 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
97 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
100 reference = adc->reference; in adcxx_max_show()
[all …]
/linux/sound/soc/codecs/
H A Drt5665.c953 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
956 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
959 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
962 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
965 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
980 SOC_DAPM_ENUM("IF2_1 ADC Swap Source", rt5665_if2_1_adc_enum);
986 SOC_DAPM_ENUM("IF2_2 ADC Swap Source", rt5665_if2_2_adc_enum);
992 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5665_if3_adc_enum);
1332 /* ADC Digital Volume Control */
1333 SOC_DOUBLE("STO1 ADC Captur
[all...]
H A Drt5677.c1014 /* ADC Digital Volume Control */
1023 SOC_DOUBLE("Mono ADC Capture Switch", RT5677_MONO_ADC_DIG_VOL,
1038 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5677_MONO_ADC_DIG_VOL,
1046 /* ADC Boost Volume Control */
1047 SOC_DOUBLE_TLV("STO1 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1050 SOC_DOUBLE_TLV("STO2 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1053 SOC_DOUBLE_TLV("STO3 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1056 SOC_DOUBLE_TLV("STO4 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1059 SOC_DOUBLE_TLV("Mono ADC Boost Volume", RT5677_ADC_BST_CTRL2,
1525 SOC_DAPM_SINGLE("Stereo ADC Switc
[all...]

12345678910>>...51