xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml (revision 13845bdc869f136f92ad3d40ea09b867bb4ce467)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 Analog Devices Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Analog Devices AD7192 ADC device driver
9
10maintainers:
11  - Michael Hennerich <michael.hennerich@analog.com>
12
13description: |
14  Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
15  found here:
16  https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
17
18properties:
19  compatible:
20    enum:
21      - adi,ad7190
22      - adi,ad7192
23      - adi,ad7193
24      - adi,ad7194
25      - adi,ad7195
26
27  "#address-cells":
28    const: 1
29
30  "#size-cells":
31    const: 0
32
33  reg:
34    maxItems: 1
35
36  spi-cpol: true
37
38  spi-cpha: true
39
40  clocks:
41    maxItems: 1
42    description:
43      Optionally, either a crystal can be attached externally between MCLK1 and
44      MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
45      pin. If absent, internal 4.92MHz clock is used, which can be made
46      available on MCLK2 pin.
47
48  clock-names:
49    enum:
50      - xtal
51      - mclk
52
53  "#clock-cells":
54    const: 0
55    description:
56      If present when internal clock is used, configured as clock provider.
57
58  interrupts:
59    maxItems: 1
60
61  aincom-supply:
62    description: |
63      AINCOM voltage supply. Analog inputs AINx are referenced to this input
64      when configured for pseudo-differential operation.
65
66  dvdd-supply:
67    description: DVdd voltage supply
68
69  avdd-supply:
70    description: AVdd voltage supply
71
72  vref-supply:
73    description: VRef voltage supply
74
75  adi,rejection-60-Hz-enable:
76    description: |
77      This bit enables a notch at 60 Hz when the first notch of the sinc
78      filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
79      60 Hz when the sinc filter first notch is at 50 Hz. This allows
80      simultaneous 50 Hz/ 60 Hz rejection.
81    type: boolean
82
83  adi,refin2-pins-enable:
84    description: |
85      External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
86    type: boolean
87
88  adi,buffer-enable:
89    description: |
90      Enables the buffer on the analog inputs. If cleared, the analog inputs
91      are unbuffered, lowering the power consumption of the device. If this
92      bit is set, the analog inputs are buffered, allowing the user to place
93      source impedances on the front end without contributing gain errors to
94      the system.
95    type: boolean
96
97  adi,burnout-currents-enable:
98    description: |
99      When this bit is set to 1, the 500 nA current sources in the signal
100      path are enabled. When BURN = 0, the burnout currents are disabled.
101      The burnout currents can be enabled only when the buffer is active
102      and when chop is disabled.
103    type: boolean
104
105  bipolar:
106    description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
107    type: boolean
108
109  rdy-gpios:
110    description:
111      GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but
112      highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its
113      DOUT aka MISO role) and so usually triggers a spurious interrupt. The
114      distinction between such a spurious event and a real one can only be done
115      by reading such a GPIO. (There is a register telling the same
116      information, but accessing that one needs a SPI transfer which then
117      triggers another interrupt event.)
118    maxItems: 1
119
120patternProperties:
121  "^channel@[0-9a-f]+$":
122    type: object
123    $ref: adc.yaml
124    unevaluatedProperties: false
125
126    properties:
127      reg:
128        description: The channel index.
129        minimum: 0
130        maximum: 271
131
132      diff-channels:
133        description:
134          Both inputs can be connected to pins AIN1 to AIN16 by choosing the
135          appropriate value from 1 to 16.
136        items:
137          minimum: 1
138          maximum: 16
139
140      single-channel:
141        description:
142          Positive input can be connected to pins AIN1 to AIN16 by choosing the
143          appropriate value from 1 to 16. Negative input is connected to AINCOM.
144        minimum: 1
145        maximum: 16
146
147    oneOf:
148      - required:
149          - reg
150          - diff-channels
151      - required:
152          - reg
153          - single-channel
154
155required:
156  - compatible
157  - reg
158  - interrupts
159  - dvdd-supply
160  - avdd-supply
161  - vref-supply
162  - spi-cpol
163  - spi-cpha
164
165allOf:
166  - $ref: /schemas/spi/spi-peripheral-props.yaml#
167  - if:
168      properties:
169        compatible:
170          enum:
171            - adi,ad7190
172            - adi,ad7192
173            - adi,ad7193
174            - adi,ad7195
175    then:
176      patternProperties:
177        "^channel@[0-9a-f]+$": false
178  - if:
179      anyOf:
180        - required:
181            - clocks
182        - required:
183            - clock-names
184    then:
185      properties:
186        "#clock-cells": false
187      required:
188        - clocks
189        - clock-names
190
191unevaluatedProperties: false
192
193examples:
194  - |
195    #include <dt-bindings/gpio/gpio.h>
196    spi {
197        #address-cells = <1>;
198        #size-cells = <0>;
199
200        adc@0 {
201            compatible = "adi,ad7192";
202            reg = <0>;
203            spi-max-frequency = <1000000>;
204            spi-cpol;
205            spi-cpha;
206            clocks = <&ad7192_mclk>;
207            clock-names = "mclk";
208            interrupts = <25 0x2>;
209            interrupt-parent = <&gpio>;
210            rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
211            aincom-supply = <&aincom>;
212            dvdd-supply = <&dvdd>;
213            avdd-supply = <&avdd>;
214            vref-supply = <&vref>;
215
216            adi,refin2-pins-enable;
217            adi,rejection-60-Hz-enable;
218            adi,buffer-enable;
219            adi,burnout-currents-enable;
220        };
221    };
222  - |
223    #include <dt-bindings/gpio/gpio.h>
224    spi {
225        #address-cells = <1>;
226        #size-cells = <0>;
227
228        adc@0 {
229            compatible = "adi,ad7194";
230            reg = <0>;
231
232            #address-cells = <1>;
233            #size-cells = <0>;
234
235            spi-max-frequency = <1000000>;
236            spi-cpol;
237            spi-cpha;
238            #clock-cells = <0>;
239            interrupts = <25 0x2>;
240            interrupt-parent = <&gpio>;
241            rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
242            aincom-supply = <&aincom>;
243            dvdd-supply = <&dvdd>;
244            avdd-supply = <&avdd>;
245            vref-supply = <&vref>;
246
247            channel@0 {
248                reg = <0>;
249                diff-channels = <1 6>;
250            };
251
252            channel@1 {
253                reg = <1>;
254                single-channel = <1>;
255            };
256        };
257    };
258