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/linux/Documentation/devicetree/bindings/power/reset/
H A Dgpio-restart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-restart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
21 is configured as an output, and driven active, triggering a level triggered reset condition.
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
24 active->inactive edge, triggering negative edge triggered reset. After a delay specified by
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H A Dgpio-poweroff.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-poweroff.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
15 from inactive to active. After a delay (active-delay-ms) it
17 delay (inactive-delay-ms) it is configured as active again.
19 the system is still running after waiting some time (timeout-ms).
22 - $ref: restart-handler.yaml#
26 const: gpio-poweroff
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2180.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
18 stdout-path = "serial0:115200n8";
27 vdd-supply = <&vdd_gpu>;
33 /delete-property/ dmas;
34 /delete-property/ dma-names;
39 /delete-property/ reg-shift;
41 compatible = "nvidia,tegra30-hsuart";
42 reset-names = "serial";
45 compatible = "brcm,bcm43540-bt";
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H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 hvddio-pex-supply = <&vdd_1v8>;
34 dvddio-pex-supply = <&vdd_pex_1v05>;
35 vddio-pex-ctl-supply = <&vdd_1v8>;
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H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
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H A Dtegra234-p3701-0008.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "tegra234-p3701.dtsi"
6 compatible = "nvidia,p3701-0008", "nvidia,tegra234";
8 thermal-zones {
9 tj-thermal {
10 polling-delay = <1000>;
11 polling-delay-passive = <1000>;
15 tj_trip_active0: active-0 {
18 type = "active";
21 tj_trip_active1: active-1 {
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H A Dtegra234-p3701-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "tegra234-p3701.dtsi"
7 compatible = "nvidia,p3701-0000", "nvidia,tegra234";
9 thermal-zones {
10 tj-thermal {
11 polling-delay = <1000>;
12 polling-delay-passive = <1000>;
16 tj_trip_active0: active-0 {
19 type = "active";
22 tj_trip_active1: active-1 {
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/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tmu.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/thermal/thermal.h>
11 thermal-zones {
12 atlas0_thermal: atlas0-thermal {
13 thermal-sensors = <&tmu_atlas0>;
14 polling-delay-passive = <0>;
15 polling-delay = <0>;
17 atlas0_alert_0: atlas0-alert-0 {
20 type = "active";
22 atlas0_alert_1: atlas0-alert-1 {
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/linux/include/soc/at91/
H A Dat91sam9_ddrsdr.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
46 #define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
48 #define AT91_DDRSDRC_ACTBST (1 << 18) /* Active Bank X to Burst Stop Read Access Bank Y [SAM9 Onl…
51 #define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
52 #define AT91_DDRSDRC_TRCD (0xf << 4) /* Row to Column delay */
53 #define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
54 #define AT91_DDRSDRC_TRC (0xf << 12) /* Row cycle delay */
55 #define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
56 #define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
57 #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
28 * pin (active high) of the S2MPS11 PMIC, which acts
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H A Dexynos5420-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 polling-delay-passive = <0>;
9 polling-delay = <0>;
11 cpu-alert-0 {
14 type = "active";
16 cpu-alert-1 {
19 type = "active";
21 cpu-alert-2 {
24 type = "active";
26 cpu-crit-0 {
/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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/linux/Documentation/devicetree/bindings/regulator/
H A Dfixed-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
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H A Dregulator-max77620.txt3 Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The input supply
6 sub-node "regulators" which is child node of device node.
14 -------------------
18 in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
19 in-sd1-supply: Input supply for SD1.
20 in-sd2-supply: Input supply for SD2.
21 in-sd3-supply: Input supply for SD3.
22 in-ldo0-1-supply: Input supply for LDO0 and LDO1.
23 in-ldo2-supply: Input supply for LDO2.
24 in-ldo3-5-supply: Input supply for LDO3 and LDO5
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dsamsung,ld9040.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrzej Hajda <a.hajda@samsung.com>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 display-timings: true
25 reset-gpios: true
27 vdd3-supply:
30 vci-supply:
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/linux/drivers/power/reset/
H A Dgpio-restart.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on the gpio-poweroff driver.
12 #include <linux/delay.h>
27 struct gpio_restart *gpio_restart = data->cb_data; in gpio_restart_notify()
29 /* drive it active, also inactive->active edge */ in gpio_restart_notify()
30 gpiod_direction_output(gpio_restart->reset_gpio, 1); in gpio_restart_notify()
31 mdelay(gpio_restart->active_delay_ms); in gpio_restart_notify()
33 /* drive inactive, also active->inactive edge */ in gpio_restart_notify()
34 gpiod_set_value(gpio_restart->reset_gpio, 0); in gpio_restart_notify()
35 mdelay(gpio_restart->inactive_delay_ms); in gpio_restart_notify()
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/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-eval-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "imx6q-apalis-eval.dtsi"
12 compatible = "toradex,apalis_imx6q-eval-v1.2", "toradex,apalis_imx6q",
15 reg_3v3_mmc: regulator-3v3-mmc {
16 compatible = "regulator-fixed";
17 enable-active-high;
19 off-on-delay-us = <100000>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_enable_3v3_mmc>;
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-s3-pinecube.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
6 /dts-v1/;
7 #include "sun8i-v3.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
38 compatible = "regulator-fixed";
39 regulator-name = "vcc5v0";
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/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr3-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
23 max-freq:
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H A Djedec,lpddr2-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr2-timings
16 max-freq:
19 Maximum DDR clock frequency for the speed-bin, in Hz.
21 min-freq:
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/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2042-evb-v2.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042";
16 stdout-path = "serial0";
19 pwmfan: pwm-fan {
20 compatible = "pwm-fan";
21 cooling-levels = <103 128 179 230 255>;
23 #cooling-cells = <2>;
26 thermal-zones {
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H A Dsg2042-milkv-pioneer.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "Milk-V Pioneer";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
26 linux,input-type = <EV_KEY>;
27 debounce-interval = <100>;
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H A Dsg2042-evb-v1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "sophgo,sg2042-evb-v1", "sophgo,sg2042";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
26 linux,input-type = <EV_KEY>;
27 debounce-interval = <100>;
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/linux/Documentation/power/
H A Druntime_pm.rst5 (C) 2009-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
18 put their PM-related work items. It is strongly recommended that pm_wq be
20 them to be synchronized with system-wide power transitions (suspend to RAM,
53 The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks
57 1. PM domain of the device, if the device's PM domain object, dev->pm_domain,
60 2. Device type of the device, if both dev->type and dev->type->pm are present.
62 3. Device class of the device, if both dev->class and dev->class->pm are
65 4. Bus type of the device, if both dev->bus and dev->bus->pm are present.
69 dev->driver->pm directly (if present).
73 and bus type. Moreover, the high-priority one will always take precedence over
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