| /linux/drivers/clk/ |
| H A D | clk-axm5516.c | 34 * @aclk: Common struct
38 struct axxia_clk aclk; member
41 #define to_axxia_pllclk(_aclk) container_of(_aclk, struct axxia_pllclk, aclk)
50 struct axxia_clk *aclk = to_axxia_clk(hw); in axxia_pllclk_recalc() local
51 struct axxia_pllclk *pll = to_axxia_pllclk(aclk); in axxia_pllclk_recalc()
55 regmap_read(aclk->regmap, pll->reg, &control); in axxia_pllclk_recalc()
70 * @aclk: Common struct
76 struct axxia_clk aclk; member
81 #define to_axxia_divclk(_aclk) container_of(_aclk, struct axxia_divclk, aclk)
89 struct axxia_clk *aclk = to_axxia_clk(hw); in axxia_divclk_recalc_rate() local
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| H A D | clk-k210.c | 301 * The first 2 SRAM banks depend on ACLK/CPU clock which is by default PLL0
326 * @aclk: ACLK clock
333 struct clk_hw aclk; member
337 #define to_k210_sysclk(_hw) container_of(_hw, struct k210_sysclk, aclk)
340 * Set ACLK parent selector: 0 for IN0, 1 for PLL0.
398 * For PLL0, we need to re-parent ACLK to IN0 to keep the CPU cores and in k210_pll_enable_hw()
645 * ACLK has IN0 and PLL0 as parents.
657 init.name = "aclk"; in k210_register_aclk()
661 ksc->aclk.init = &init; in k210_register_aclk()
663 ret = of_clk_hw_register(np, &ksc->aclk); in k210_register_aclk()
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| /linux/drivers/clk/sophgo/ |
| H A D | clk-cv18xx-ip.c | 795 struct cv1800_clk_audio *aclk = hw_to_cv1800_clk_audio(hw); in aclk_enable() local
797 cv1800_clk_setbit(&aclk->common, &aclk->src_en); in aclk_enable()
798 return cv1800_clk_setbit(&aclk->common, &aclk->output_en); in aclk_enable()
803 struct cv1800_clk_audio *aclk = hw_to_cv1800_clk_audio(hw); in aclk_disable() local
805 cv1800_clk_clearbit(&aclk->common, &aclk->output_en); in aclk_disable()
806 cv1800_clk_clearbit(&aclk->common, &aclk->src_en); in aclk_disable()
811 struct cv1800_clk_audio *aclk = hw_to_cv1800_clk_audio(hw); in aclk_is_enabled() local
813 return cv1800_clk_checkbit(&aclk->common, &aclk->output_en); in aclk_is_enabled()
819 struct cv1800_clk_audio *aclk = hw_to_cv1800_clk_audio(hw); in aclk_determine_rate() local
821 req->rate = aclk->target_rate; in aclk_determine_rate()
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| /linux/drivers/memory/ |
| H A D | pl353-smc.c | 21 * @aclk: Pointer to the AXI peripheral clock
25 struct clk *aclk; member
33 clk_disable(pl353_smc->aclk); in pl353_smc_suspend()
43 ret = clk_enable(pl353_smc->aclk); in pl353_smc_resume()
52 clk_disable(pl353_smc->aclk); in pl353_smc_resume()
82 pl353_smc->aclk = devm_clk_get_enabled(&adev->dev, "apb_pclk"); in pl353_smc_probe()
83 if (IS_ERR(pl353_smc->aclk)) in pl353_smc_probe()
84 return dev_err_probe(&adev->dev, PTR_ERR(pl353_smc->aclk), in pl353_smc_probe()
85 "aclk clock not found.\n"); in pl353_smc_probe()
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| /linux/drivers/media/dvb-frontends/ |
| H A D | z0194a.h | 15 u8 aclk = 0; in sharp_z0194a_set_symbol_rate() local
19 aclk = 0xb7; bclk = 0x47; } in sharp_z0194a_set_symbol_rate()
21 aclk = 0xb7; bclk = 0x4b; } in sharp_z0194a_set_symbol_rate()
23 aclk = 0xb7; bclk = 0x4f; } in sharp_z0194a_set_symbol_rate()
25 aclk = 0xb7; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
27 aclk = 0xb6; bclk = 0x53; } in sharp_z0194a_set_symbol_rate()
29 aclk = 0xb4; bclk = 0x51; } in sharp_z0194a_set_symbol_rate()
31 stv0299_writereg(fe, 0x13, aclk); in sharp_z0194a_set_symbol_rate()
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| H A D | bsbe1.h | 36 u8 aclk = 0; in alps_bsbe1_set_symbol_rate() local
39 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; } in alps_bsbe1_set_symbol_rate()
40 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; } in alps_bsbe1_set_symbol_rate()
41 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; } in alps_bsbe1_set_symbol_rate()
42 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
43 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; } in alps_bsbe1_set_symbol_rate()
44 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; } in alps_bsbe1_set_symbol_rate()
46 stv0299_writereg(fe, 0x13, aclk); in alps_bsbe1_set_symbol_rate()
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| H A D | bsru6.h | 55 u8 aclk = 0; in alps_bsru6_set_symbol_rate() local
59 aclk = 0xb7; in alps_bsru6_set_symbol_rate()
62 aclk = 0xb7; in alps_bsru6_set_symbol_rate()
65 aclk = 0xb7; in alps_bsru6_set_symbol_rate()
68 aclk = 0xb7; in alps_bsru6_set_symbol_rate()
71 aclk = 0xb6; in alps_bsru6_set_symbol_rate()
74 aclk = 0xb4; in alps_bsru6_set_symbol_rate()
78 stv0299_writereg(fe, 0x13, aclk); in alps_bsru6_set_symbol_rate()
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| /linux/drivers/media/pci/mantis/ |
| H A D | mantis_vp1033.c | 109 u8 aclk = 0; in lgtdqcs001f_set_symbol_rate() local
113 aclk = 0xb7; in lgtdqcs001f_set_symbol_rate()
116 aclk = 0xb7; in lgtdqcs001f_set_symbol_rate()
119 aclk = 0xb7; in lgtdqcs001f_set_symbol_rate()
122 aclk = 0xb7; in lgtdqcs001f_set_symbol_rate()
125 aclk = 0xb6; in lgtdqcs001f_set_symbol_rate()
128 aclk = 0xb4; in lgtdqcs001f_set_symbol_rate()
131 stv0299_writereg(fe, 0x13, aclk); in lgtdqcs001f_set_symbol_rate()
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| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_crtc.c | 51 u64 pxlclk, aclk; in komeda_crtc_update_clock_ratio() local
59 aclk = komeda_crtc_get_aclk(kcrtc_st); in komeda_crtc_update_clock_ratio()
61 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); in komeda_crtc_update_clock_ratio()
137 /* Only need to enable aclk on single display mode, but no need to in komeda_crtc_prepare()
138 * enable aclk it on dual display mode, since the dual mode always in komeda_crtc_prepare()
139 * switch from single display mode, the aclk already enabled, no need in komeda_crtc_prepare()
143 err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st)); in komeda_crtc_prepare()
145 DRM_ERROR("failed to set aclk.\n"); in komeda_crtc_prepare()
146 err = clk_prepare_enable(mdev->aclk); in komeda_crtc_prepare()
148 DRM_ERROR("failed to enable aclk.\n"); in komeda_crtc_prepare()
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| /linux/drivers/bus/ |
| H A D | bt1-axi.c | 40 * @aclk: AXI reference clock.
51 struct clk *aclk; member
151 axi->aclk = devm_clk_get_enabled(axi->dev, "aclk"); in bt1_axi_request_clk()
152 if (IS_ERR(axi->aclk)) in bt1_axi_request_clk()
153 return dev_err_probe(axi->dev, PTR_ERR(axi->aclk), in bt1_axi_request_clk()
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | rockchip,rk3399-pcie-common.yaml | 21 - const: aclk
22 - const: aclk-perf
54 - const: aclk
|
| H A D | rockchip,rk3399-pcie-ep.yaml | 54 clock-names = "aclk", "aclk-perf",
62 "pm", "pclk", "aclk";
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | hisilicon,phy-hi3670-pcie.yaml | 35 - description: PCIe ACLK clock
43 - const: aclk
78 "apb_phy", "apb_sys", "aclk";
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| /linux/drivers/clk/xilinx/ |
| H A D | xlnx_vcu.c | 53 * @aclk: axi clock source
63 struct clk *aclk; member
656 xvcu->aclk = devm_clk_get(&pdev->dev, "aclk"); in xvcu_probe()
657 if (IS_ERR(xvcu->aclk)) { in xvcu_probe()
658 dev_err(&pdev->dev, "Could not get aclk clock\n"); in xvcu_probe()
659 return PTR_ERR(xvcu->aclk); in xvcu_probe()
668 ret = clk_prepare_enable(xvcu->aclk); in xvcu_probe()
670 dev_err(&pdev->dev, "aclk clock enable failed\n"); in xvcu_probe()
693 clk_disable_unprepare(xvcu->aclk); in xvcu_probe()
716 clk_disable_unprepare(xvcu->aclk); in xvcu_remove()
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| /linux/drivers/gpu/drm/renesas/rz-du/ |
| H A D | rzg2l_du_crtc.c | 183 ret = clk_prepare_enable(rcrtc->rzg2l_clocks.aclk); in rzg2l_du_crtc_get()
203 clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk); in rzg2l_du_crtc_get()
212 clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk); in rzg2l_du_crtc_put()
389 rcrtc->rzg2l_clocks.aclk = devm_clk_get(rcdu->dev, "aclk"); in rzg2l_du_crtc_create()
390 if (IS_ERR(rcrtc->rzg2l_clocks.aclk)) { in rzg2l_du_crtc_create()
392 return PTR_ERR(rcrtc->rzg2l_clocks.aclk); in rzg2l_du_crtc_create()
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | snps,dw-umctl2-ddrc.yaml | 70 enum: [ pclk, aclk, core, sbr ]
114 clocks = <&pclk>, <&aclk>, <&core_clk>, <&sbr_clk>;
115 clock-names = "pclk", "aclk", "core", "sbr";
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| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433.dtsi | 666 clock-names = "pclk", "aclk";
1145 clock-names = "pclk", "aclk", "aclk_xiu",
1160 clock-names = "pclk", "aclk", "aclk_xiu",
1175 clock-names = "pclk", "aclk", "aclk_xiu",
1241 clock-names = "pclk", "aclk", "aclk_xiu";
1253 clock-names = "pclk", "aclk", "aclk_xiu";
1265 clock-names = "pclk", "aclk", "aclk_xiu", "sclk";
1278 clock-names = "pclk", "aclk", "aclk_xiu";
1291 clock-names = "aclk", "pclk";
1302 clock-names = "aclk", "pclk";
[all …]
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| /linux/drivers/gpu/drm/exynos/ |
| H A D | exynos7_drm_decon.c | 66 struct clk *aclk; member
745 ctx->aclk = devm_clk_get(dev, "aclk_decon0"); in decon_probe()
746 if (IS_ERR(ctx->aclk)) { in decon_probe()
747 dev_err(dev, "failed to get bus clock aclk\n"); in decon_probe()
748 ret = PTR_ERR(ctx->aclk); in decon_probe()
821 clk_disable_unprepare(ctx->aclk); in exynos7_decon_suspend()
839 ret = clk_prepare_enable(ctx->aclk); in exynos7_decon_resume()
841 DRM_DEV_ERROR(dev, "Failed to prepare_enable the aclk [%d]\n", in exynos7_decon_resume()
865 clk_disable_unprepare(ctx->aclk); in exynos7_decon_resume()
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| /linux/drivers/phy/hisilicon/ |
| H A D | phy-hi3670-pcie.c | 167 struct clk *aclk;
490 ret = clk_set_rate(phy->aclk, AXI_CLK_FREQ); in hi3670_pcie_allclk_ctrl()
618 ret = clk_prepare_enable(phy->aclk); in kirin_pcie_clk_ctrl()
631 clk_disable_unprepare(phy->aclk); in kirin_pcie_clk_ctrl()
785 phy->aclk = devm_clk_get(dev, "aclk"); in hi3670_pcie_phy_get_resources()
786 if (IS_ERR(phy->aclk)) in hi3670_pcie_phy_get_resources()
787 return PTR_ERR(phy->aclk); in hi3670_pcie_phy_get_resources()
162 struct clk *aclk; global() member
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| /linux/drivers/media/common/b2c2/ |
| H A D | flexcop-fe-tuner.c | 201 u8 aclk = 0; in samsung_tbmu24112_set_symbol_rate() local
205 aclk = 0xb7; bclk = 0x47; in samsung_tbmu24112_set_symbol_rate()
207 aclk = 0xb7; bclk = 0x4b; in samsung_tbmu24112_set_symbol_rate()
209 aclk = 0xb7; bclk = 0x4f; in samsung_tbmu24112_set_symbol_rate()
211 aclk = 0xb7; bclk = 0x53; in samsung_tbmu24112_set_symbol_rate()
213 aclk = 0xb6; bclk = 0x53; in samsung_tbmu24112_set_symbol_rate()
215 aclk = 0xb4; bclk = 0x51; in samsung_tbmu24112_set_symbol_rate()
218 stv0299_writereg(fe, 0x13, aclk); in samsung_tbmu24112_set_symbol_rate()
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| /linux/Documentation/devicetree/bindings/gpu/ |
| H A D | samsung-scaler.yaml | 69 - description: aclk clock
74 - const: aclk
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| /linux/Documentation/devicetree/bindings/fpga/ |
| H A D | xlnx,pr-decoupler.yaml | 49 - const: aclk
65 clock-names = "aclk";
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| /linux/Documentation/devicetree/bindings/media/ |
| H A D | rockchip-rga.yaml | 41 - const: aclk
80 clock-names = "aclk", "hclk", "sclk";
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| H A D | samsung,s5pv210-jpeg.yaml | 101 - const: aclk
116 clock-names = "pclk", "aclk", "aclk_xiu", "sclk";
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| /linux/Documentation/devicetree/bindings/crypto/ |
| H A D | rockchip,rk3288-crypto.yaml | 53 - const: aclk
124 clock-names = "aclk", "hclk", "sclk", "apb_pclk";
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