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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
[all …]
H A Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
33 st,fmc2-ebi-cs-cclk-enable:
36 during asynchronous and synchronous access. By default, the
37 FMC_CLK is only generated during synchronous access.
[all …]
H A Dti-aemif.txt4 provide a glue-less interface to a variety of asynchronous memory devices like
6 can be accessed at any given time via four chip selects with 64M byte access
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap-gpmc-smsc911x.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 vddvario: regulator-vddvario {
11 compatible = "regulator-fixed";
12 regulator-name = "vddvario";
13 regulator-always-on;
16 vdd33a: regulator-vdd33a {
17 compatible = "regulator-fixed";
18 regulator-name = "vdd33a";
19 regulator-always-on;
26 bank-width = <2>;
[all …]
H A Domap-gpmc-smsc9221.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 vddvario: regulator-vddvario {
15 compatible = "regulator-fixed";
16 regulator-name = "vddvario";
17 regulator-always-on;
20 vdd33a: regulator-vdd33a {
21 compatible = "regulator-fixed";
22 regulator-name = "vdd33a";
23 regulator-always-on;
30 bank-width = <2>;
[all …]
H A Domap3-overo-tobiduo-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "omap3-overo-common-peripherals.dtsi"
12 #include "omap-gpmc-smsc9221.dtsi"
17 interrupt-parent = <&gpio6>;
23 bank-width = <2>;
25 gpmc,mux-add-data = <0>;
26 gpmc,cs-on-ns = <0>;
27 gpmc,cs-rd-off-ns = <42>;
28 gpmc,cs-wr-off-ns = <36>;
29 gpmc,adv-on-ns = <6>;
[all …]
H A Domap2430-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
20 clock-frequency = <100000>;
31 vmmc-supply = <&vmmc1>;
32 bus-width = <4>;
39 interrupt-parent = <&gpio5>;
42 bank-width = <2>;
43 gpmc,sync-clk-ps = <0>;
[all …]
H A Domap-zoom-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include "omap-gpmc-smsc911x.dtsi"
20 bank-width = <2>;
21 reg-shift = <1>;
22 reg-io-width = <1>;
23 interrupt-parent = <&gpio4>;
25 clock-frequency = <1843200>;
26 current-speed = <115200>;
27 gpmc,mux-add-data = <0>;
28 gpmc,device-width = <1>;
[all …]
H A Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
[all …]
H A Domap3-lilly-a83x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 model = "INCOstartec LILLY-A83X module (DM3730)";
10 compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3";
22 compatible = "gpio-leds";
25 label = "lilly-a83x::led1";
27 linux,default-trigger = "default-on";
33 compatible = "ti,omap-twl4030";
34 ti,model = "lilly-a83x";
40 compatible = "regulator-fixed";
41 regulator-name = "VCC3";
[all …]
H A Domap4-duovero-parlor.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include "omap4-duovero.dtsi"
9 #include <dt-bindings/input/input.h>
13 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
20 compatible = "gpio-leds";
24 linux,default-trigger = "heartbeat";
29 compatible = "gpio-keys";
30 #address-cells = <1>;
31 #size-cells = <0>;
[all …]
H A Dam335x-nano.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
39 misc_pins: misc-pins {
40 pinctrl-single,pins = <
[all …]
H A Domap2420-h4.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap2420-h4", "ti,omap2420", "ti,omap2";
23 compatible = "cfi-flash";
24 linux,mtd-name = "intel,ge28f256l18b85";
25 #address-cells = <1>;
26 #size-cells = <1>;
28 bank-width = <2>;
30 gpmc,mux-add-data = <2>;
[all …]
H A Domap2420-n8x0-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
[all …]
H A Domap3-lilly-dbb056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 /dts-v1/;
7 #include "omap3-lilly-a83x.dtsi"
10 model = "INCOstartec LILLY-DBB056 (DM3730)";
11 …compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,…
15 vaux2: regulator-vaux2 {
16 compatible = "ti,twl4030-vaux2";
17 regulator-min-microvolt = <2800000>;
18 regulator-max-microvolt = <2800000>;
19 regulator-always-on;
[all …]
H A Dam335x-chilisom.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "grinn,am335x-chilisom", "ti,am33xx";
15 cpu0-supply = <&dcdc2_reg>;
26 pinctrl-names = "default";
28 i2c0_pins: i2c0-pins {
29 pinctrl-single,pins = <
35 nandflash_pins: nandflash-pins {
36 pinctrl-single,pins = <
[all …]
/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
41 $0-$7e Autokonfig-space, see Z-II docs.
[all …]
/linux/tools/testing/selftests/proc/
H A Dproc-pidns.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 _tmp_seen >= 0 ? _tmp_seen : -errno; }), #seen, _t, 1)
36 return -1; in touch()
40 FIXTURE(ns) in FIXTURE() argument
46 FIXTURE_SETUP(ns) in FIXTURE_SETUP() argument
49 self->host_mntns = open("/proc/self/ns/mnt", O_RDONLY|O_CLOEXEC); in FIXTURE_SETUP()
50 ASSERT_SUCCESS(self->host_mntns); in FIXTURE_SETUP()
64 * child so that we get a usable nsfd that we can bind-mount and open. in FIXTURE_SETUP()
70 self->host_pidns = open("/proc/self/ns/pid", O_RDONLY|O_CLOEXEC); in FIXTURE_SETUP()
71 ASSERT_SUCCESS(self->host_pidns); in FIXTURE_SETUP()
[all …]
/linux/include/linux/usb/
H A Disp1362.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * board initialization code should put one of these into dev->platform_data
15 /* On-chip overcurrent protection */
37 /* Inter-io delay (ns). The chip is picky about access timings; it
39 * 110ns delay between consecutive accesses to DATA_REG,
40 * 300ns delay between access to ADDR_REG and DATA_REG (registers)
41 * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory)
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-lp-sk-nand.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "k3-pinctrl.h"
17 gpmc0_pins_default: gpmc0-pins-default {
18 pinctrl-single,pins = <
44 pinctrl-names = "default";
45 pinctrl-0 = <&gpmc0_pins_default>;
[all …]
H A Dk3-am642-evm-nand.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "k3-pinctrl.h"
15 gpmc0_default_pins: gpmc0-default-pins {
16 bootph-all;
17 pinctrl-single,pins = <
53 gpmc0-hog {
[all …]
/linux/Documentation/gpu/nova/core/
H A Dfalcon.rst1 .. SPDX-License-Identifier: GPL-2.0
10 interactions of nova-core driver with the Falcon.
12 NVIDIA GPUs embed small RISC-like microcontrollers called Falcon cores, which
15 processor) and SEC2 (the security engine)) and also may integrate a RISC-V core.
16 This core is capable of running both RISC-V and Falcon code.
22 small DMA engine (via the FBIF - "Frame Buffer Interface") to load code from
23 system memory. The nova-core driver must reset and configure the Falcon, load
28 Falcons can run in Non-secure (NS), Light Secure (LS), or Heavy Secure (HS)
32 --------------------------------------------------------
33 HS ucode is the most trusted code and has access to pretty much everything on
[all …]
/linux/drivers/platform/x86/intel/pmt/
H A Dclass.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/io-64-nonatomic-lo-hi.h>
36 return !!(ivdev->quirks & VSEC_QUIRK_EARLY_HW); in intel_pmt_is_early_client_hw()
47 return -EFAULT; in pmt_memcpy64_fromio()
66 if (cb && cb->read_telem) in pmt_telem_read_mmio()
67 return cb->read_telem(pdev, guid, buf, off, count); in pmt_telem_read_mmio()
72 /* PUNIT on SPR only supports aligned 64-bit read */ in pmt_telem_read_mmio()
94 return -EINVAL; in intel_pmt_read()
96 if (off >= entry->size) in intel_pmt_read()
99 if (count > entry->size - off) in intel_pmt_read()
[all …]
/linux/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
33 #include <linux/omap-gpmc.h>
37 #include <linux/platform_data/mtd-nand-omap2.h>
39 #define DEVICE_NAME "omap-gpmc"
258 /* Define chip-selects as reserved by default until probe completes */
306 * gpmc_get_clk_period - get period of selected clock domain in ps
343 return (time_ns * 1000 + tick_ps - 1) / tick_ps; in gpmc_ns_to_clk_ticks()
358 return (time_ps + tick_ps - 1) / tick_ps; in gpmc_ps_to_ticks()
[all …]
/linux/include/linux/
H A Dnsproxy.h1 /* SPDX-License-Identifier: GPL-2.0 */
17 * A structure to contain pointers to all per-process
18 * namespaces - fs (mount), uts, network, sysvipc, etc.
20 * The pid namespace is an exception -- it's accessed using
63 if (set->flags & CLONE_NEWUSER) in nsset_cred()
64 return (struct cred *)set->cred; in nsset_cred()
70 * the namespaces access rules are:
72 * 1. only current task is allowed to change tsk->nsproxy pointer or
74 * when changing tsk->nsproxy.
76 * 2. when accessing (i.e. reading) current task's namespaces - no
[all …]

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