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/freebsd/sys/contrib/device-tree/Bindings/access-controllers/
H A Daccess-controllers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic Domain Access Controllers
10 - Oleksii Moisieiev <oleksii_moisieiev@epam.com>
13 Common access controllers properties
15 Access controllers are in charge of stating which of the hardware blocks under
18 or a group of hardware blocks. An access controller's domain is the set of
19 resources covered by the access controller.
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Dstm32mp153.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
12 compatible = "arm,cortex-a7";
13 clock-frequency = <650000000>;
19 arm-pmu {
22 interrupt-affinity = <&cpu0>, <&cpu1>;
37 reg-names = "m_can", "message_ram";
40 interrupt-names = "int0", "int1";
42 clock-names = "hclk", "cclk";
43 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
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/freebsd/sys/contrib/device-tree/src/arm64/st/
H A Dstm32mp251.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
9 #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
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H A Dstm32mp255.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 compatible = "st,stm32mp25-vdec";
14 access-controllers = <&rifsc 89>;
19 compatible = "st,stm32mp25-venc";
23 access-controllers = <&rifsc 90>;
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dnvidia,tegra186-gpio.txt1 NVIDIA Tegra186 GPIO controllers
3 Tegra186 contains two GPIO controllers; a main controller and an "AON"
4 controller. This binding document applies to both controllers. The register
5 layouts for the controllers share many similarities, but also some significant
14 a) Security registers, which allow configuration of allowed access to the GPIO
17 varies between the different GPIO controllers.
19 Access to this set of registers is not necessary in all circumstances. Code
20 that wishes to configure access to the GPIO registers needs access to these
22 need access to these registers.
25 controllers, these registers are exposed via multiple "physical aliases" in
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H A Dnvidia,tegra186-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 Tegra186 contains two GPIO controllers; a main controller and an "AON"
15 controller. This binding document applies to both controllers. The register
16 layouts for the controllers share many similarities, but also some
25 a) Security registers, which allow configuration of allowed access to the
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dgpmc-eth.txt4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
5 such as ethernet controllers to processors using the TI GPMC as a data bus.
7 Ethernet controllers connected to TI GPMC are represented as child nodes of
12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
18 Child nodes need to specify the GPMC bus address width using the "bank-width"
20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21 address width, it supports devices with 32-bit word registers.
23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit
27 and 16-bit devices and so must be either 1 or 2 bytes.
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/freebsd/sys/arm/conf/
H A DALPINE6 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
56 # ATA controllers
57 device ahci # AHCI-compatible SATA controllers
58 device ata # Legacy ATA/SATA controllers
63 device da # Direct Access (disks)
64 device sa # Sequential Access (tape etc)
66 device pass # Passthrough device (direct ATA/SCSI access)
67 device ses # Enclosure Services (SES and SAF-TE)
76 device al_pci # Annapurna Alpine PCI-E
91 makeoptions FDT_DTS_FILE=annapurna-alpine.dts
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dst,stm32-etzpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 devices with programmable-security attributes (securable resources).
14 - Gatien Chevallier <gatien.chevallier@foss.st.com>
20 const: st,stm32-etzpc
22 - compatible
27 - const: st,stm32-etzpc
28 - const: simple-bus
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H A Dst,stm32mp25-rifsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gatien Chevallier <gatien.chevallier@foss.st.com>
19 - RISC registers associated with RISUP logic (resource isolation device unit
20 for peripherals), assign all non-RIF aware peripherals to zero, one or
22 - RIMC registers: associated with RIMU logic (resource isolation master
23 unit), assign all non RIF-aware bus master to one security domain by
25 Alternatively, the RISUP logic controlling the device port access to a
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/freebsd/sys/powerpc/conf/
H A DGENERIC2 # GENERIC -- Generic kernel configuration file for FreeBSD/powerpc
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
32 options PSERIES # PAPR-compliant systems
46 options UFS_ACL # Support for access control lists
48 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
58 options PSEUDOFS # Pseudo-filesystem framework
74 options SYSVSHM # SYSV-style shared memory
75 options SYSVMSG # SYSV-styl
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H A DGENERIC64LE2 # GENERIC64LE -- Generic kernel configuration file for FreeBSD/powerpc64le
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
31 options PSERIES # PAPR-compliant systems (e.g. IBM p)
32 options POWERNV # Non-virtualized OpenPOWER systems
37 options NUMA # Non-Uniform Memory Architecture support
51 options UFS_ACL # Support for access control lists
53 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
64 options PSEUDOFS # Pseudo-filesyste
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H A DGENERIC642 # GENERIC64 -- Generic kernel configuration file for FreeBSD/powerpc64
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
33 options PSERIES # PAPR-compliant systems (e.g. IBM p)
34 options POWERNV # Non-virtualized OpenPOWER systems
38 options NUMA # Non-Uniform Memory Architecture support
53 options UFS_ACL # Support for access control lists
55 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
66 options PSEUDOFS # Pseudo-filesyste
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/freebsd/sys/amd64/conf/
H A DGENERIC2 # GENERIC -- Generic kernel configuration file for FreeBSD/amd64
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
23 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
27 options NUMA # Non-Uniform Memory Architecture support
44 options UFS_ACL # Support for access control lists
46 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
56 options PSEUDOFS # Pseudo-filesystem framework
75 options SYSVSHM # SYSV-style shared memory
76 options SYSVMSG # SYSV-styl
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The IXP4xx expansion bus controller handles access to devices on the
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
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H A Dst,stm32-fmc2-ebi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
19 Select. The FMC2 performs only one access at a time to an external device.
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
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/freebsd/sys/i386/conf/
H A DGENERIC2 # GENERIC -- Generic kernel configuration file for FreeBSD/i386
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
40 options UFS_ACL # Support for access control lists
42 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
52 options PSEUDOFS # Pseudo-filesystem framework
69 options SYSVSHM # SYSV-style shared memory
70 options SYSVMSG # SYSV-style message queues
71 options SYSVSEM # SYSV-styl
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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dgpmc-nor.txt8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 - bank-width: Width of NOR flash in bytes. GPMC supports 8-bit and
12 16-bit devices and so must be either 1 or 2 bytes.
13 - compatible: Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
14 - gpmc,cs-on-ns: Chip-select assertion time
15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
16 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
17 - gpmc,oe-on-ns: Output-enable assertion time
18 - gpmc,oe-off-ns: Output-enable de-assertion time
19 - gpmc,we-on-ns Write-enable assertion time
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/freebsd/sbin/nvmecontrol/
H A Dnvmecontrol.83 .\" Copyright (c) 2018-2019 Alexander Motin <mav@FreeBSD.org>
51 .Aq Ar device-id | Ar namespace-id
59 .Aq Ar namespace-id
62 .Aq Ar device-id
67 .Op Fl v Ar vendor-string
72 .Aq Ar device-id | Ar namespace-id
75 .Aq Ar device-id
78 .Aq Ar device-id
83 .Aq Ar device-id
87 .Aq Ar device-id
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/freebsd/share/man/man4/
H A Dida.49 .Nd Compaq Intelligent Drive Array Controllers
14 .Bd -ragged -offset indent
22 .Bd -literal -offset indent
28 It unites these hard drives into one or more high-performance logical drives.
31 These controllers have the ability to provide fault tolerance for the connected
33 It is also possible for an application to access the SCSI bus subsystem
34 directly by using the pass-through interface.
36 The following controllers are supported by the
40 .Bl -bullet -compact
54 Compaq SMART-2/DH Controller
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H A Daac.434 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
53 and Ultra320, SATA and SAS RAID controllers.
55 Access to RAID containers is available via the
60 device enables the SCSI pass-thru interface and allows devices connected
61 to the card such as CD-ROMs to be available via the CAM
68 device nodes provide access to the management interface of the controller.
81 Linux-compatible
84 Linux-based management applications to control the card.
86 Controllers supported by the
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-orion.txt4 - compatible : should be on of the following:
5 - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs
6 - "marvell,armada-370-spi", for the Armada 370 SoCs
7 - "marvell,armada-375-spi", for the Armada 375 SoCs
8 - "marvell,armada-380-spi", for the Armada 38x SoCs
9 - "marvell,armada-390-spi", for the Armada 39x SoCs
10 - "marvell,armada-xp-spi", for the Armada XP SoCs
11 - reg : offset and length of the register set for the device.
13 the SPI direct access mode that some of the Marvell SoCs support
14 additionally to the normal indirect access (PIO) mode. The values
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/freebsd/sys/conf/
H A DNOTES2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs.
11 # Please use ``make LINT'' to create an old-style LINT file if you want to
12 # do kernel test-builds.
48 # auto-size based on physical memory.
66 # after most other flags. Here we use it to inhibit use of non-optimal
67 # gcc built-in functions (e.g., memcmp).
70 # The following is equivalent to 'config -g KERNELNAME' and creates
71 # 'kernel.debug' compiled with -g debugging as well as a normal
81 makeoptions CONF_CFLAGS=-fno-builtin #Don't allow use of memcmp, etc.
82 #makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
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