/linux/arch/xtensa/include/asm/ |
H A D | traps.h | 96 " mov a12, a12\n" in spill_registers() 106 " mov a12, a0\n" in spill_registers() 110 " mov a12, a12\n" in spill_registers() 122 " mov a12, a12\n" in spill_registers()
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H A D | asmmacro.h | 315 #define abi_saved0 a12
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/linux/arch/arm64/crypto/ |
H A D | chacha-neon-core.S | 180 a12 .req w25 232 mov a12, v12.s[0] 255 eor a12, a12, a0 264 ror a12, a12, #16 277 add a8, a8, a12 322 eor a12, a12, a0 331 ror a12, a12, #24 344 add a8, a8, a12 391 eor a12, a12, a1 400 ror a12, a12, #16 [all …]
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/linux/arch/xtensa/lib/ |
H A D | umulsidi3.S | 16 s32i a12, sp, 16 109 mov dst, a12 152 l32i a12, sp, 16 194 result is returned in a12, and a8 and a15 are clobbered. */ 223 mul_mulsi3_body a12, a13, a14, a15, a8
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H A D | usercopy.S | 218 slli a12, a7, 4 219 add a12, a12, a3 # a12 = end of last 16B source chunk 242 blt a3, a12, .Loop2
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/linux/arch/xtensa/kernel/ |
H A D | entry.S | 183 s32i a12, a1, PT_AREG12 323 s32i a12, a1, PT_AREG12 734 l32i a12, a1, PT_AREG12 1253 /* The spill routine might clobber a4, a7, a8, a11, a12, and a15. */ 1259 s32i a12, a2, PT_AREG12 1351 s32e a12, a8, -32 1406 l32i a12, a2, PT_AREG12 2004 * May clobber: a12, a13 2015 addi a12, a0, 3 2019 mov a12, a0 [all …]
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H A D | mcount.S | 25 * must be preserved in addition to callee-saved a12 - a15.
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H A D | align.S | 321 mov a12, a3 ; _j .Lexit; .align 8 340 mov a3, a12 ; _j .Lstore_w; .align 8
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/linux/arch/arm/ |
H A D | Kconfig | 779 bool "ARM errata: A12: some seqs of opposed cond code instrs => deadlock or corruption" 783 - Cortex-A12 818325: Execution of an UNPREDICTABLE STR or STM 785 - Cortex-A12 852422: Execution of a sequence of instructions might 787 any Cortex-A12 cores yet. 793 bool "ARM errata: A12: sequence of VMOV to core registers might lead to a dead lock" 796 This option enables the workaround for the 821420 Cortex-A12 803 bool "ARM errata: A12: DMB NSHST/ISHST mixed ... might cause deadlock" 806 This option enables the workaround for the 825619 Cortex-A12 812 bool "ARM errata: A12: CPU might deadlock under some very rare internal conditions" 815 This option enables the workaround for the 857271 Cortex-A12 [all …]
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/linux/tools/testing/selftests/bpf/progs/ |
H A D | test_usdt.c | 71 short a11, signed char a12) in BPF_USDT() argument 92 usdt12_args[11] = a12; in BPF_USDT()
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/linux/drivers/gpu/drm/radeon/ |
H A D | radeon_clocks.c | 673 /*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300 */ in radeon_legacy_set_clock_gating() 695 /* RV200::A11 A12 RV250::A11 A12 */ in radeon_legacy_set_clock_gating() 707 /* RV200::A11 A12, RV250::A11 A12 */ in radeon_legacy_set_clock_gating()
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/linux/tools/perf/arch/xtensa/include/ |
H A D | dwarf-regs-table.h | 7 "a8", "a9", "a10", "a11", "a12", "a13", "a14", "a15",
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/linux/tools/perf/arch/xtensa/util/ |
H A D | dwarf-regs.c |
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/linux/Documentation/admin-guide/device-mapper/ |
H A D | dm-raid.rst | 146 A5 A6 A7 A8 A9 A9 A10 A11 A12 150 A6 A5 A9 A7 A8 A10 A9 A12 A11 164 A5 A6 A7 A8 A9 A9 A10 A11 A12 165 A6 A5 A9 A7 A8 A10 A9 A12 A11
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/linux/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed-g4.c | 1277 #define A12 152 macro 1278 SIG_EXPR_LIST_DECL_SINGLE(A12, GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0)); 1279 SIG_EXPR_LIST_DECL_SINGLE(A12, RMII1TXEN, RMII1, RMII1_DESC); 1280 SIG_EXPR_LIST_DECL_SINGLE(A12, RGMII1TXCK, RGMII1); 1281 PIN_DECL_(A12, SIG_EXPR_LIST_PTR(A12, GPIOT0), 1282 SIG_EXPR_LIST_PTR(A12, RMII1TXEN), 1283 SIG_EXPR_LIST_PTR(A12, RGMII1TXCK)); 1457 FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1459 FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11, 1911 ASPEED_PINCTRL_PIN(A12), [all …]
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/linux/include/scsi/ |
H A D | iser.h | 49 * struct iser_cm_hdr - iSER CM header (from iSER Annex A12)
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/linux/drivers/staging/media/ipu3/include/uapi/ |
H A D | intel-ipu3.h | 287 * anti-symmetry type. A12 is center, A1-A11 are neighbours. 303 * @y1_coeff_2.a12: filter1 coefficients A12, u8, default 128. 320 * @y2_coeff_2.a12: filter1 coefficients A12, u8, default 128. 361 __u8 a12; member 382 __u8 a12; member 1286 * @a12: slope A points 12, s4.4, default 0. 1312 __u32 a12:9; member 1360 * @a12: Slope A1 of Config Unit, s4.4, default 0. 1377 __u32 a12:9; member 1400 * @a12: Slope A of Config Unit radial, s7.8 [all …]
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/linux/tools/perf/arch/s390/include/ |
H A D | dwarf-regs-table.h | 58 REG_DWARFNUM_NAME(a12, 60),
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | mt6359-regulator.yaml | 38 "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$": 44 pattern: "^v(rfck|emc|a12|a09|ufs|bbck)$"
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/linux/drivers/media/pci/mantis/ |
H A D | mantis_common.h | 157 /* A12 A13 A14 */
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/linux/arch/arm/mm/ |
H A D | proc-v7.S | 510 /* Cortex-A12 Errata */ 511 ldr r10, =0x00000c0d @ Cortex-A12 primary part number 748 * ARM Ltd. Cortex A12 processor.
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/linux/drivers/net/wan/ |
H A D | slic_ds26522.c | 36 * w/r|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|A3|A2|A1|A0|x
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/linux/drivers/net/mdio/ |
H A D | Kconfig | 55 A12, A10s, etc.)
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/linux/Documentation/admin-guide/media/ |
H A D | visl.rst | 163 00000040: e8c3 4320 b4ba a226 cbc1 4138 3a12 32d6 ..C ...&..A8:.2.
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288.dtsi | 52 compatible = "arm,cortex-a12-pmu"; 68 compatible = "arm,cortex-a12"; 79 compatible = "arm,cortex-a12"; 90 compatible = "arm,cortex-a12"; 101 compatible = "arm,cortex-a12";
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