| /linux/arch/riscv/boot/dts/tenstorrent/ |
| H A D | blackhole.dtsi | 22 "zifencei", "zfh", "zba", "zbb", "sscofpmf";
38 "zifencei", "zfh", "zba", "zbb", "sscofpmf";
54 "zifencei", "zfh", "zba", "zbb", "sscofpmf";
70 "zifencei", "zfh", "zba", "zbb", "sscofpmf";
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| /linux/arch/riscv/include/asm/ |
| H A D | checksum.h | 49 * ZBB only saves three instructions on 32-bit and five on 64-bit so not in ip_fast_csum()
59 .option arch,+zbb \n\ in ip_fast_csum()
67 .option arch,+zbb \n\ in ip_fast_csum()
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| H A D | arch_hweight.h | 28 ".option arch,+zbb\n" in __arch_hweight32()
55 ".option arch,+zbb\n" in __arch_hweight64()
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| H A D | bitops.h | 53 ".option arch,+zbb\n" in variable__ffs()
78 ".option arch,+zbb\n" in variable__fls()
106 ".option arch,+zbb\n" in variable_ffs()
134 ".option arch,+zbb\n" in variable_fls()
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| H A D | swab.h | 40 ".option arch,+zbb\n" \
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| H A D | runtime-const.h | 42 * doesn't support Zbkb but does support the Zbb extension, we can
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| /linux/arch/riscv/lib/ |
| H A D | csum.c | 49 .option arch,+zbb \n\ in csum_ipv6_magic()
153 .option arch,+zbb \n\ in do_csum_with_alignment()
168 .option arch,+zbb \n\ in do_csum_with_alignment()
225 .option arch,+zbb \n\ in do_csum_no_alignment()
235 .option arch,+zbb \n\ in do_csum_no_alignment()
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| H A D | strcmp.S | 43 * Variant of strcmp using the ZBB extension if available.
51 .option arch,+zbb
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| H A D | strncmp.S | 48 * Variant of strncmp using the ZBB extension if available
54 .option arch,+zbb
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| H A D | strnlen.S | 45 * Variant of strnlen using the ZBB extension if available
59 .option arch,+zbb
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| /linux/arch/riscv/boot/dts/starfive/ |
| H A D | jh7110.dtsi | 32 riscv,isa-extensions = "i", "m", "a", "c", "zba", "zbb", "zicntr", "zicsr",
62 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
96 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
130 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
164 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr",
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| /linux/arch/riscv/ |
| H A D | Kconfig | 746 bool "Zbb extension support for bit manipulation instructions"
751 Zbb extension is detected at boot. Some optimisations may
752 additionally depend on toolchain support for Zbb.
754 The Zbb extension provides instructions to accelerate a number
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| /linux/tools/testing/selftests/kvm/riscv/ |
| H A D | get-reg-list.c | 568 KVM_ISA_EXT_ARR(ZBB), in isa_ext_single_id_to_str()
1193 KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
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| /linux/arch/riscv/kernel/ |
| H A D | setup.c | 365 if (!IS_ENABLED(CONFIG_RISCV_ISA_ZBB) || !riscv_isa_extension_available(NULL, ZBB)) in setup_arch()
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| H A D | sys_hwprobe.c | 116 EXT_KEY(isainfo->isa, ZBB, pair->value, missing); in hwprobe_isa_ext0()
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| H A D | cpufeature.c | 536 __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB),
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| /linux/Documentation/arch/riscv/ |
| H A D | hwprobe.rst | 88 * :c:macro:`RISCV_HWPROBE_EXT_ZBB`: The Zbb extension is supported, as defined
|