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/linux/arch/arm/mm/
H A Dproc-xscale.S3 * linux/arch/arm/mm/proc-xscale.S
9 * MMU functions for the Intel XScale CPUs
57 * Without this the XScale core exhibits cache eviction problems and no one
175 * XScale supports clock switching, but using idle mode support
572 define_processor_functions xscale, dabort=v5t_early_abort, pabort=legacy_pabort, suspend=1
579 string cpu_80200_A0_A1_name, "XScale-80200 A0/A1"
580 string cpu_80200_name, "XScale-80200"
581 string cpu_80219_name, "XScale-80219"
582 string cpu_8032x_name, "XScale-IOP8032x Family"
583 string cpu_8033x_name, "XScale-IOP8033x Family"
[all …]
H A Dcopypage-xscale.c3 * linux/arch/arm/lib/copypage-xscale.S
7 * This handles the mini data cache, as found on SA11x0 and XScale
29 * XScale mini-dcache optimised copy_user_highpage
45 .arch xscale \n\ in mc_copy_user_page()
105 * XScale optimised clear_user_page
112 .arch xscale \n\ in xscale_mc_clear_user_highpage()
H A Dcopypage-xsc3.c7 * Adapted for 3rd gen XScale core, no more mini-dcache
32 .arch xscale \n\ in xsc3_mc_copy_user_page()
78 * XScale optimised clear_user_page
84 .arch xscale \n\ in xsc3_mc_clear_user_highpage()
H A Dfsr-2level.c32 { do_bad, SIGBUS, 0, "lock abort" }, /* xscale */
34 { do_bad, SIGBUS, BUS_OBJERR, "imprecise external abort" }, /* xscale */
36 { do_bad, SIGBUS, 0, "dcache parity error" }, /* xscale */
H A Dproc-macros.S194 * covering most CPUs except Xscale and Xscale 3.
235 * Xscale set_pte_ext translation, split into two halves to cope
/linux/drivers/clk/spear/
H A Dspear1340_clock.c264 {.xscale = 5, .yscale = 122, .eq = 0},
266 {.xscale = 10, .yscale = 204, .eq = 0},
268 {.xscale = 4, .yscale = 25, .eq = 0},
270 {.xscale = 4, .yscale = 21, .eq = 0},
272 {.xscale = 5, .yscale = 18, .eq = 0},
274 {.xscale = 2, .yscale = 6, .eq = 0},
276 {.xscale = 5, .yscale = 12, .eq = 0},
278 {.xscale = 2, .yscale = 4, .eq = 0},
280 {.xscale = 5, .yscale = 18, .eq = 1},
282 {.xscale = 1, .yscale = 3, .eq = 1},
[all …]
H A Dspear1310_clock.c252 {.xscale = 10, .yscale = 204, .eq = 0}, /* 12.29 MHz */
253 {.xscale = 4, .yscale = 21, .eq = 0}, /* 48 MHz */
254 {.xscale = 2, .yscale = 6, .eq = 0}, /* 83 MHz */
255 {.xscale = 2, .yscale = 4, .eq = 0}, /* 125 MHz */
256 {.xscale = 1, .yscale = 3, .eq = 1}, /* 166 MHz */
257 {.xscale = 1, .yscale = 2, .eq = 1}, /* 250 MHz */
263 {.xscale = 2, .yscale = 6, .eq = 0}, /* divided by 6 */
264 {.xscale = 2, .yscale = 4, .eq = 0}, /* divided by 4 */
265 {.xscale = 1, .yscale = 3, .eq = 1}, /* divided by 3 */
266 {.xscale = 1, .yscale = 2, .eq = 1}, /* divided by 2 */
[all …]
H A Dspear3xx_clock.c107 {.xscale = 1, .yscale = 81, .eq = 0}, /* 2.049 MHz */
108 {.xscale = 1, .yscale = 59, .eq = 0}, /* 2.822 MHz */
109 {.xscale = 2, .yscale = 81, .eq = 0}, /* 4.098 MHz */
110 {.xscale = 3, .yscale = 89, .eq = 0}, /* 5.644 MHz */
111 {.xscale = 4, .yscale = 81, .eq = 0}, /* 8.197 MHz */
112 {.xscale = 4, .yscale = 59, .eq = 0}, /* 11.254 MHz */
113 {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
114 {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
115 {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
116 {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
H A Dspear6xx_clock.c91 {.xscale = 2, .yscale = 27, .eq = 0}, /* 12.296 MHz */
92 {.xscale = 2, .yscale = 8, .eq = 0}, /* 41.5 MHz */
93 {.xscale = 2, .yscale = 4, .eq = 0}, /* 83 MHz */
94 {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
/linux/drivers/video/fbdev/omap/
H A Dlcd_dma.c63 int xscale, yscale; member
122 void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) in omap_set_lcd_dma_b1_scale() argument
128 lcd_dma.xscale = xscale; in omap_set_lcd_dma_b1_scale()
141 unsigned int xscale, yscale; in set_b1_regs() local
159 xscale = lcd_dma.xscale ? lcd_dma.xscale : 1; in set_b1_regs()
164 ((y) * vxres * yscale + (x) * xscale) * es) in set_b1_regs()
271 lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale)) in set_b1_regs()
322 lcd_dma.xscale = 0; in omap_request_lcd_dma()
/linux/arch/arm/kernel/
H A Dxscale-cp0.c3 * linux/arch/arm/kernel/xscale-cp0.c
5 * XScale DSP and iWMMXt coprocessor context switching and handling
155 /* do not attempt to probe iwmmxt on non-xscale family CPUs */ in xscale_cp0_init()
164 pr_warn("CAUTION: XScale iWMMXt coprocessor detected, but kernel support is missing.\n"); in xscale_cp0_init()
166 pr_info("XScale iWMMXt coprocessor detected.\n"); in xscale_cp0_init()
172 pr_info("XScale DSP coprocessor detected.\n"); in xscale_cp0_init()
H A DMakefile76 obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
77 obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
78 obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
/linux/drivers/net/ethernet/xscale/
H A DKconfig3 # Intel XScale IXP device configuration
7 bool "Intel XScale IXP devices"
16 the questions about XScale IXP devices. If you say Y, you will be
/linux/Documentation/arch/arm/
H A Dmemory.rst25 For SA11xx and Xscale, this is used to
38 fffe0000 fffeffff XScale cache flush area. This is used
39 in proc-xscale.S to flush the whole data
40 cache. (XScale does not have TCM.)
H A Dmarvell.rst368 * This line of SoCs originates from the XScale family developed by
373 * Due to their XScale origin, these SoCs have virtually nothing in
422 * This line of SoCs originates from the XScale family developed by
426 * Due to their XScale origin, these SoCs have virtually nothing in
471 The XScale cores were designed by Intel, and shipped by Marvell in the older
473 and that evolved into Sheeva. The XScale and Feroceon cores were phased out
477 XScale 1
480 XScale 2
483 XScale 3
/linux/arch/arm/include/asm/
H A Dcputype.h299 case 0x69052000: /* Intel XScale 1 */ in cpu_is_xscale_family()
300 case 0x69054000: /* Intel XScale 2 */ in cpu_is_xscale_family()
301 case 0x69056000: /* Intel XScale 3 */ in cpu_is_xscale_family()
302 case 0x56056000: /* Marvell XScale 3 */ in cpu_is_xscale_family()
H A Dglue-df.h24 * xscale - ARMv5 with Thumb with Xscale extensions
H A Dpage.h37 * xscale - Xscale
/linux/arch/arm/boot/compressed/
H A Dhead-xscale.S3 * linux/arch/arm/boot/compressed/head-xscale.S
5 * XScale specific tweaks. This is merged into head.S by the linker.
/linux/arch/arm/boot/dts/marvell/
H A Dpxa910.dtsi71 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
81 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
91 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
H A Dpxa168.dtsi61 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
71 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
81 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
H A Dmmp2.dtsi292 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
302 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
312 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
322 compatible = "mrvl,mmp-uart", "intel,xscale-uart";
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp4xx.dtsi3 * Device Tree file for Intel XScale Network Processors
85 compatible = "intel,xscale-uart";
99 compatible = "intel,xscale-uart";
/linux/drivers/mtd/maps/
H A Dpxa2xx-flash.c3 * Map driver for Intel XScale PXA2xx platforms.
139 MODULE_DESCRIPTION("MTD map driver for Intel XScale PXA2xx");
/linux/drivers/gpu/drm/i915/display/
H A Dintel_overlay.c620 u32 xscale, yscale, xscale_UV, yscale_UV; in update_scaling_factors() local
628 xscale = ((params->src_scan_width - 1) << FP_SHIFT) / in update_scaling_factors()
631 xscale = 1 << FP_SHIFT; in update_scaling_factors()
640 xscale_UV = xscale/uv_hscale; in update_scaling_factors()
643 xscale = xscale_UV * uv_hscale; in update_scaling_factors()
650 if (xscale != overlay->old_xscale || yscale != overlay->old_yscale) in update_scaling_factors()
652 overlay->old_xscale = xscale; in update_scaling_factors()
656 ((xscale >> FP_SHIFT) << 16) | in update_scaling_factors()
657 ((xscale & FRACT_MASK) << 3), in update_scaling_factors()

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