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/linux/Documentation/devicetree/bindings/net/
H A Dcalxeda-xgmac.yaml4 $id: http://devicetree.org/schemas/net/calxeda-xgmac.yaml#
7 title: Calxeda Highbank 10Gb XGMAC Ethernet controller
10 The Calxeda XGMAC Ethernet controllers are directly connected to the
21 const: calxeda,hb-xgmac
28 Can point to at most 3 xgmac interrupts. The 1st one is the main
46 compatible = "calxeda,hb-xgmac";
/linux/drivers/net/ethernet/calxeda/
H A DKconfig3 tristate "Calxeda 1G/10G XGMAC Ethernet driver"
8 This is the driver for the XGMAC Ethernet IP block found on Calxeda
H A Dxgmac.c19 /* XGMAC Register definitions */
39 #define XGMAC_MMC_CTRL 0x00000800 /* XGMAC MMC Control */
128 /* XGMAC Frame Filter defines */
142 /* XGMAC FLOW CTRL defines */
244 /* XGMAC Operation Mode Register */
260 /* XGMAC HW Features Register */
265 /* XGMAC Descriptor Defines */
386 /* XGMAC Configuration Settings */
403 /* XGMAC Descriptor Access Helpers */
550 netdev_dbg(priv->dev, "XGMAC RX : Dest Address filter fail\n"); in desc_get_rx_status()
[all …]
H A DMakefile2 obj-$(CONFIG_NET_CALXEDA_XGMAC) += xgmac.o
/linux/drivers/net/ethernet/sfc/siena/
H A Dfarch_regs.h1814 /* XM_ADR_LO_REG: XGMAC address register low */
1819 /* XM_ADR_HI_REG: XGMAC address register high */
1824 /* XM_GLB_CFG_REG: XGMAC global configuration */
1843 /* XM_TX_CFG_REG: XGMAC transmit configuration */
1864 /* XM_RX_CFG_REG: XGMAC receive configuration */
1904 /* XM_FC_REG: XGMAC flow control register */
1925 /* XM_PAUSE_TIME_REG: XGMAC pause time register */
1932 /* XM_TX_PARAM_REG: XGMAC transmit parameter register */
1943 /* XM_RX_PARAM_REG: XGMAC receive parameter register */
1950 /* XM_MGT_INT_MSK_REG: XGMAC management interrupt mask register */
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dfarch_regs.h1814 /* XM_ADR_LO_REG: XGMAC address register low */
1819 /* XM_ADR_HI_REG: XGMAC address register high */
1824 /* XM_GLB_CFG_REG: XGMAC global configuration */
1843 /* XM_TX_CFG_REG: XGMAC transmit configuration */
1864 /* XM_RX_CFG_REG: XGMAC receive configuration */
1904 /* XM_FC_REG: XGMAC flow control register */
1925 /* XM_PAUSE_TIME_REG: XGMAC pause time register */
1932 /* XM_TX_PARAM_REG: XGMAC transmit parameter register */
1943 /* XM_RX_PARAM_REG: XGMAC receive parameter register */
1950 /* XM_MGT_INT_MSK_REG: XGMAC management interrupt mask register */
[all …]
H A Dtenxpress.c224 /* The XGMAC clock is driven from the SFX7101 312MHz clock, so in tenxpress_special_reset()
225 * a special software reset can glitch the XGMAC sufficiently for stats in tenxpress_special_reset()
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A DMakefile9 xgmac.o sge.o l2t.o cxgb3_offload.o aq100x.o
H A Dcxgb3_main.c2740 * Scan the XGMAC's to check for various conditions which we want to in t3_adap_check_task()
H A Dt3_hw.c1777 * XGMAC interrupt handler.
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores
50 | XGMAC - 10G Ethernet MAC | 2.10a | N/A | XGMAC2+ |
227 GMAC, GMAC4/5 and XGMAC core.
276 TSO (TCP Segmentation Offload) feature is supported by GMAC > 4.x and XGMAC
494 36) HW uses XGMAC>2.10 cores::
/linux/arch/arm/boot/dts/calxeda/
H A Decx-common.dtsi204 compatible = "calxeda,hb-xgmac";
211 compatible = "calxeda,hb-xgmac";
/linux/Documentation/devicetree/bindings/phy/
H A Dcalxeda-combophy.yaml12 SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
/linux/drivers/net/ethernet/freescale/
H A DKconfig72 tristate "Freescale XGMAC MDIO"
H A Dxgmac_mdio.c394 bus->name = "Freescale XGMAC MDIO Bus"; in xgmac_mdio_probe()
/linux/arch/arm/mach-highbank/
H A Dhighbank.c84 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { in highbank_platform_notifier()
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe.h1009 /* XGMAC/XPCS related mmio registers */
1010 void __iomem *xgmac_regs; /* XGMAC CSRs */
/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_mac.c983 * return 0 - gmac, 1 - xgmac , negative --fail
/linux/drivers/scsi/csiostor/
H A Dcsio_hw.c3557 * XGMAC interrupt handler.
3568 csio_fatal(hw, "XGMAC %d Tx FIFO parity error\n", port); in csio_xgmac_intr_handler()
3570 csio_fatal(hw, "XGMAC %d Rx FIFO parity error\n", port); in csio_xgmac_intr_handler()
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2.h490 /* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0,
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_eth_soc.c506 /* Force Port1 XGMAC Link Up */ in mtk_setup_bridge_switch()
731 /* XGMAC except for built-in switch */ in mtk_mac_link_down()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c4943 * XGMAC interrupt handler.
4961 dev_alert(adap->pdev_dev, "XGMAC %d Tx FIFO parity error\n", in xgmac_intr_handler()
4964 dev_alert(adap->pdev_dev, "XGMAC %d Rx FIFO parity error\n", in xgmac_intr_handler()
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_main.c915 /* Check if adv_ts can be enabled for dwmac 4.x / xgmac core */ in stmmac_init_timestamping()
2594 /* Split up the shared Tx/Rx FIFO memory on DW QoS Eth and DW XGMAC */ in stmmac_dma_operation_mode()