| /linux/lib/crc/riscv/ | 
| H A D | crc-clmul-consts.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */5 …*	./scripts/gen-crc-consts.py riscv_clmul crc16_msb_0x8bb7,crc32_msb_0x04c11db7,crc32_lsb_0xedb883…
 18  * Constants generated for most-significant-bit-first CRC-16 using
 19  * G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0
 23 	.fold_across_2_longs_const_hi = 0x0000000000001faa, /* x^192 mod G */
 24 	.fold_across_2_longs_const_lo = 0x000000000000a010, /* x^128 mod G */
 25 	.barrett_reduction_const_1 = 0xfb2d2bfc0e99d245, /* floor(x^79 / G) */
 26 	.barrett_reduction_const_2 = 0x0000000000008bb7, /* G - x^16 */
 28 	.fold_across_2_longs_const_hi = 0x00005890, /* x^96 mod G */
 29 	.fold_across_2_longs_const_lo = 0x0000f249, /* x^64 mod G */
 [all …]
 
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| /linux/lib/crc/x86/ | 
| H A D | crc-pclmul-consts.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */5 …*	./scripts/gen-crc-consts.py x86_pclmul crc16_msb_0x8bb7,crc32_lsb_0xedb88320,crc32_lsb_0x82f63b7…
 11  * CRC folding constants generated for most-significant-bit-first CRC-16 using
 12  * G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0
 26 		0xdccf000000000000,	/* LO64_TERMS: (x^2000 mod G) * x^48 */
 27 		0x4b0b000000000000,	/* HI64_TERMS: (x^2064 mod G) * x^48 */
 30 		0x9d9d000000000000,	/* LO64_TERMS: (x^976 mod G) * x^48 */
 31 		0x7cf5000000000000,	/* HI64_TERMS: (x^1040 mod G) * x^48 */
 34 		0x044c000000000000,	/* LO64_TERMS: (x^464 mod G) * x^48 */
 35 		0xe658000000000000,	/* HI64_TERMS: (x^528 mod G) * x^48 */
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| /linux/tools/memory-model/ | 
| H A D | linux-kernel.def | 1 // SPDX-License-Identifier: GPL-2.0+4 // "Frightening small children and disconcerting grown-ups: Concurrency
 9 READ_ONCE(X) __load{ONCE}(X)
 10 WRITE_ONCE(X,V) { __store{ONCE}(X,V); }
 13 smp_store_release(X,V) { __store{RELEASE}(*X,
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| /linux/drivers/gpu/drm/imagination/ | 
| H A D | pvr_rogue_fwif_sf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */47  *  -   ---   ---- ----     ----      ----        ---- ---- ----
 48  *     0-11: id number
 49  *    12-15: group id number
 50  *    16-19: number of parameters
 51  *    20-27: unused
 52  *    28-30: active: identify SF packet, otherwise regular int32
 65 #define ROGUE_FW_SF_GID(x) (((u32)(x) >> 12) & 0xfU)  argument
 67 #define ROGUE_FW_SF_PARAMNUM(x) (((u32)(x) >> 16) & 0xfU)  argument
 80 	  "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },
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| /linux/lib/crypto/ | 
| H A D | chacha-block-generic.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later18 	u32 *x = state->x;  in chacha_permute()  local
 25 		x[0]  += x[4];    x[12] = rol32(x[12] ^ x[0],  16);  in chacha_permute()
 26 		x[1]  += x[5];    x[13] = rol32(x[13] ^ x[1],  16);  in chacha_permute()
 27 		x[2]  += x[6];    x[14] = rol32(x[14] ^ x[2],  16);  in chacha_permute()
 28 		x[3]  += x[7];    x[15] = rol32(x[15] ^ x[3],  16);  in chacha_permute()
 30 		x[8]  += x[12];   x[4]  = rol32(x[4]  ^ x[8],  12);  in chacha_permute()
 31 		x[9]  += x[13];   x[5]  = rol32(x[5]  ^ x[9],  12);  in chacha_permute()
 32 		x[10] += x[14];   x[6]  = rol32(x[6]  ^ x[10], 12);  in chacha_permute()
 33 		x[11] += x[15];   x[7]  = rol32(x[7]  ^ x[11], 12);  in chacha_permute()
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| /linux/drivers/cpufreq/ | 
| H A D | longhaul.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */6  *  VIA-specific information
 59 	-1, /* 0000 -> RESERVED */
 60 	30, /* 0001 ->  3.0x */
 61 	40, /* 0010 ->  4.0x */
 62 	-1, /* 0011 -> RESERVED */
 63 	-1, /* 0100 -> RESERVED */
 64 	35, /* 0101 ->  3.5x */
 65 	45, /* 0110 ->  4.5x */
 66 	55, /* 0111 ->  5.5x */
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| /linux/drivers/gpu/drm/nouveau/nvkm/nvfw/ | 
| H A D | flcn.c | 29 	nvkm_debug(subdev, "\tdmaIdx        : %d\n", hdr->dma_idx);  in loader_config_dump()30 	nvkm_debug(subdev, "\tcodeDmaBase   : 0x%xx\n", hdr->code_dma_base);  in loader_config_dump()
 31 	nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total);  in loader_config_dump()
 32 	nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load);  in loader_config_dump()
 33 	nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point);  in loader_config_dump()
 34 	nvkm_debug(subdev, "\tdataDmaBase   : 0x%x\n", hdr->data_dma_base);  in loader_config_dump()
 35 	nvkm_debug(subdev, "\tdataSize      : 0x%x\n", hdr->data_size);  in loader_config_dump()
 36 	nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base);  in loader_config_dump()
 37 	nvkm_debug(subdev, "\targc          : 0x%08x\n", hdr->argc);  in loader_config_dump()
 38 	nvkm_debug(subdev, "\targv          : 0x%08x\n", hdr->argv);  in loader_config_dump()
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| H A D | acr.c | 29 	nvkm_debug(subdev, "\tfalconID      : %d\n", hdr->falcon_id);  in wpr_header_dump()30 	nvkm_debug(subdev, "\tlsbOffset     : 0x%x\n", hdr->lsb_offset);  in wpr_header_dump()
 31 	nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner);  in wpr_header_dump()
 32 	nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap);  in wpr_header_dump()
 33 	nvkm_debug(subdev, "\tstatus        : %d\n", hdr->status);  in wpr_header_dump()
 40 	nvkm_debug(subdev, "\tfalconID      : %d\n", hdr->falcon_id);  in wpr_header_v1_dump()
 41 	nvkm_debug(subdev, "\tlsbOffset     : 0x%x\n", hdr->lsb_offset);  in wpr_header_v1_dump()
 42 	nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner);  in wpr_header_v1_dump()
 43 	nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap);  in wpr_header_v1_dump()
 44 	nvkm_debug(subdev, "\tbinVersion    : %d\n", hdr->bin_version);  in wpr_header_v1_dump()
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| H A D | ls.c | 33 			   hdr->descriptor_size);  in nvfw_ls_desc_head()34 	nvkm_debug(subdev, "\timageSize            : %d\n", hdr->image_size);  in nvfw_ls_desc_head()
 35 	nvkm_debug(subdev, "\ttoolsVersion         : 0x%x\n",  in nvfw_ls_desc_head()
 36 			   hdr->tools_version);  in nvfw_ls_desc_head()
 37 	nvkm_debug(subdev, "\tappVersion           : 0x%x\n", hdr->app_version);  in nvfw_ls_desc_head()
 39 	date = kstrndup(hdr->date, sizeof(hdr->date), GFP_KERNEL);  in nvfw_ls_desc_head()
 43 	nvkm_debug(subdev, "\tbootloaderStartOffset: 0x%x\n",  in nvfw_ls_desc_head()
 44 			   hdr->bootloader_start_offset);  in nvfw_ls_desc_head()
 45 	nvkm_debug(subdev, "\tbootloaderSize       : 0x%x\n",  in nvfw_ls_desc_head()
 46 			   hdr->bootloader_size);  in nvfw_ls_desc_head()
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| /linux/Documentation/sound/cards/ | 
| H A D | multisound.sh | 4 #  -- Andrew Veliath <andrewtv@usa.net>15 #  -=-=- Getting Firmware -=-=-
 26 #  Currently, full-duplex digital audio (/dev/dsp only, /dev/audio is
 37 #  snd-msnd-lib           - MultiSound base (requires snd)
 39 #  snd-msnd-classic       - Base audio/mixer support for Classic, Monetery and
 42 #  snd-msnd-pinnacle      - Base audio/mixer support for Pinnacle and Fiji cards
 45 #  Important Notes - Read Before Using
 69 #  These cards are configured through the driver snd-msnd-classic.  You must
 81 #  can be used to configure the card in non-PnP mode, and in PnP mode
 84 #  pinnaclecfg is not required; you can use the snd-msnd-pinnacle module
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| /linux/drivers/scsi/qla4xxx/ | 
| H A D | ql4_dbg.c | 1 // SPDX-License-Identifier: GPL-2.0-only4  * Copyright (c)  2003-2012 QLogic Corporation
 19 	printk("------------------------------------------------------------"  in qla4xxx_dump_buffer()
 20 	       "--\n");  in qla4xxx_dump_buffer()
 22 		printk("%02x", *c);  in qla4xxx_dump_buffer()
 38 			printk(KERN_INFO "mailbox[%d]     = 0x%08X\n",  in qla4xxx_dump_registers()
 39 			    i, readl(&ha->qla4_82xx_reg->mailbox_in[i]));  in qla4xxx_dump_registers()
 44 		printk(KERN_INFO "0x%02X mailbox[%d]      = 0x%08X\n",  in qla4xxx_dump_registers()
 46 		    readw(&ha->reg->mailbox[i]));  in qla4xxx_dump_registers()
 49 	printk(KERN_INFO "0x%02X flash_address            = 0x%08X\n",  in qla4xxx_dump_registers()
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| /linux/net/xfrm/ | 
| H A D | xfrm_state.c | 1 // SPDX-License-Identifier: GPL-2.0-only11  * 		Split up af-specific functions
 36 	rcu_dereference_protected((table), lockdep_is_held(&(net)->xfrm.xfrm_state_lock))
 38 	rcu_dereference_check((table), lockdep_is_held(&(net)->xfrm.xfrm_state_lock))
 56 static inline bool xfrm_state_hold_rcu(struct xfrm_state __rcu *x)  in xfrm_state_hold_rcu()  argument
 58 	return refcount_inc_not_zero(&x->refcnt);  in xfrm_state_hold_rcu()
 67 	lockdep_assert_held(&net->xfrm.xfrm_state_lock);  in xfrm_dst_hash()
 69 	return __xfrm_dst_hash(daddr, saddr, reqid, family, net->xfrm.state_hmask);  in xfrm_dst_hash()
 77 	lockdep_assert_held(&net->xfrm.xfrm_state_lock);  in xfrm_src_hash()
 79 	return __xfrm_src_hash(daddr, saddr, family, net->xfrm.state_hmask);  in xfrm_src_hash()
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| H A D | xfrm_replay.c | 1 // SPDX-License-Identifier: GPL-2.0-only3  * xfrm_replay.c - xfrm replay detection, derived from xfrm_state.c.
 12 u32 xfrm_replay_seqhi(struct xfrm_state *x, __be32 net_seq)  in xfrm_replay_seqhi()  argument
 15 	struct xfrm_replay_state_esn *replay_esn = x->replay_esn;  in xfrm_replay_seqhi()
 17 	if (!(x->props.flags & XFRM_STATE_ESN))  in xfrm_replay_seqhi()
 21 	seq_hi = replay_esn->seq_hi;  in xfrm_replay_seqhi()
 22 	bottom = replay_esn->seq - replay_esn->replay_window + 1;  in xfrm_replay_seqhi()
 24 	if (likely(replay_esn->seq >= replay_esn->replay_window - 1)) {  in xfrm_replay_seqhi()
 31 			seq_hi--;  in xfrm_replay_seqhi()
 38 static void xfrm_replay_notify_bmp(struct xfrm_state *x, int event);
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| /linux/arch/powerpc/platforms/44x/ | 
| H A D | fsp2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later3  * FSP-2 board specific routines
 7  *    Copyright 2002-2005 MontaVista Software Inc.
 10  *    Copyright (c) 2003-2005 Zultys Technologies
 31 #define FSP2_BUS_ERR	"ibm,bus-error-irq"
 32 #define FSP2_CMU_ERR	"ibm,cmu-error-irq"
 33 #define FSP2_CONF_ERR	"ibm,conf-error-irq"
 34 #define FSP2_OPBD_ERR	"ibm,opbd-error-irq"
 35 #define FSP2_MCUE	"ibm,mc-ue-irq"
 36 #define FSP2_RST_WRN	"ibm,reset-warning-irq"
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| /linux/arch/mips/include/asm/sibyte/ | 
| H A D | sb1250_genbus.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */27  * Generic Bus Region Configuration Registers (Table 11-4)
 40 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
 43 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
 45 #define V_IO_WIDTH_SEL(x)	_SB_MAKEVALUE(x, S_IO_WIDTH_SEL)  argument
 46 #define G_IO_WIDTH_SEL(x)	_SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL)  argument
 50 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
 54 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
 62 #define V_IO_TIMEOUT(x)		_SB_MAKEVALUE(x, S_IO_TIMEOUT)  argument
 63 #define G_IO_TIMEOUT(x)		_SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT)  argument
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| H A D | sb1250_ldt.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */58 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 60 #endif /* 1250 PASS2 || 112x PASS1 */
 72 #define V_LDT_DEVICEID_VENDOR(x)	_SB_MAKEVALUE_32(x, S_LDT_DEVICEID_VENDOR)  argument
 73 #define G_LDT_DEVICEID_VENDOR(x)	_SB_GETVALUE_32(x, S_LDT_DEVICEID_VENDOR, M_LDT_DEVICEID_VENDOR)  argument
 77 #define V_LDT_DEVICEID_DEVICEID(x)	_SB_MAKEVALUE_32(x, S_LDT_DEVICEID_DEVICEID)  argument
 78 #define G_LDT_DEVICEID_DEVICEID(x)	_SB_GETVALUE_32(x, S_LDT_DEVICEID_DEVICEID, M_LDT_DEVICEID_DEVIC…  argument
 82  * LDT Command Register (Table 8-13)
 102 #define V_LDT_CLASSREV_REV(x)		_SB_MAKEVALUE_32(x, S_LDT_CLASSREV_REV)  argument
 103 #define G_LDT_CLASSREV_REV(x)		_SB_GETVALUE_32(x, S_LDT_CLASSREV_REV, M_LDT_CLASSREV_REV)  argument
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| H A D | sb1250_mc.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */26  * Memory Channel Config Register (table 6-14)
 34 #define V_MC_CHANNEL_SEL(x)	    _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL)  argument
 35 #define G_MC_CHANNEL_SEL(x)	    _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL)  argument
 39 #define V_MC_BANK0_MAP(x)	    _SB_MAKEVALUE(x, S_MC_BANK0_MAP)  argument
 40 #define G_MC_BANK0_MAP(x)	    _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP)  argument
 47 #define V_MC_BANK1_MAP(x)	    _SB_MAKEVALUE(x, S_MC_BANK1_MAP)  argument
 48 #define G_MC_BANK1_MAP(x)	    _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP)  argument
 55 #define V_MC_BANK2_MAP(x)	    _SB_MAKEVALUE(x, S_MC_BANK2_MAP)  argument
 56 #define G_MC_BANK2_MAP(x)	    _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP)  argument
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| /linux/scripts/coccinelle/api/alloc/ | 
| H A D | zalloc-simple.cocci | 1 // SPDX-License-Identifier: GPL-2.0-only10 // Copyright: (C) 2009-2010 Julia Lawall, Nicolas Palix, DIKU.
 11 // Copyright: (C) 2009-2010 Gilles Muller, INRIA/LiP6.
 14 // Options: --no-includes --include-headers
 26 //----------------------------------------------------------
 28 //----------------------------------------------------------
 32 expression x;
 37 * x = (T)\(kmalloc(E1, ...)\|vmalloc(E1)\|dma_alloc_coherent(...,E1,...)\|
 40   if ((x==NULL) || ...) S
 41 * memset((T2)x,0,E1);
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| /linux/arch/arm/include/asm/ | 
| H A D | opcodes.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */24 #define ___asm_opcode_swab32(x) (	\  argument
 25 	  (((x) << 24) & 0xFF000000)	\
 26 	| (((x) <<  8) & 0x00FF0000)	\
 27 	| (((x) >>  8) & 0x0000FF00)	\
 28 	| (((x) >> 24) & 0x000000FF)	\
 30 #define ___asm_opcode_swab16(x) (	\  argument
 31 	  (((x) << 8) & 0xFF00)		\
 32 	| (((x) >> 8) & 0x00FF)		\
 34 #define ___asm_opcode_swahb32(x) (	\  argument
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| /linux/include/math-emu/ | 
| H A D | op-common.h | 1 /* Software floating-point emulation. Common operations.22    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 27 #define _FP_DECL(wc, X)			\  argument
 28   _FP_I_TYPE X##_c=0, X##_s=0, X##_e=0;	\
 29   _FP_FRAC_DECL_##wc(X)
 36 #define _FP_UNPACK_CANONICAL(fs, wc, X)					\  argument
 38   switch (X##_e)							\
 41     _FP_FRAC_HIGH_RAW_##fs(X) |= _FP_IMPLBIT_##fs;			\
 42     _FP_FRAC_SLL_##wc(X, _FP_WORKBITS);					\
 43     X##_e -= _FP_EXPBIAS_##fs;						\
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| H A D | double.h | 1 /* Software floating-point emulation.23    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 39 #define _FP_FRACXBITS_D		(_FP_FRACTBITS_D - _FP_FRACBITS_D)
 41 #define _FP_WFRACXBITS_D	(_FP_FRACTBITS_D - _FP_WFRACBITS_D)
 47 	((_FP_W_TYPE)1 << (_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE)
 49 	((_FP_W_TYPE)1 << (_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE)
 62     unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
 66     unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
 73 #define FP_DECL_D(X)		_FP_DECL(2,X)  argument
 74 #define FP_UNPACK_RAW_D(X,val)	_FP_UNPACK_RAW_2(D,X,val)  argument
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| H A D | quad.h | 1 /* Software floating-point emulation.23    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 39 #define _FP_FRACXBITS_Q		(_FP_FRACTBITS_Q - _FP_FRACBITS_Q)
 41 #define _FP_WFRACXBITS_Q	(_FP_FRACTBITS_Q - _FP_WFRACBITS_Q)
 47 	((_FP_W_TYPE)1 << (_FP_FRACBITS_Q-2) % _FP_W_TYPE_SIZE)
 49 	((_FP_W_TYPE)1 << (_FP_FRACBITS_Q-1) % _FP_W_TYPE_SIZE)
 63       unsigned long frac3 : _FP_FRACBITS_Q - (_FP_IMPLBIT_Q != 0)-(_FP_W_TYPE_SIZE * 3);
 71       unsigned long frac3 : _FP_FRACBITS_Q - (_FP_IMPLBIT_Q != 0)-(_FP_W_TYPE_SIZE * 3);
 79 #define FP_DECL_Q(X)		_FP_DECL(4,X)  argument
 80 #define FP_UNPACK_RAW_Q(X,val)	_FP_UNPACK_RAW_4(Q,X,val)  argument
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| /linux/lib/crc/ | 
| H A D | crc64-main.c | 1 // SPDX-License-Identifier: GPL-2.03  * Normal 64-bit CRC calculation.
 5  * This is a basic crc64 implementation following ECMA-182 specification,
 7  * https://www.ecma-international.org/publications/standards/Ecma-182.htm
 10  * algorithm, here the CRC64 code is also inspired by the table-driven
 15  * crc64table[256] is the lookup table of a table-driven 64-bit CRC
 17  * time. The polynomial of crc64 arithmetic is from ECMA-182 specification
 20  * x^64 + x^62 + x^57 + x^55 + x^54 + x^53 + x^52 + x^47 + x^46 + x^45 +
 21  * x^40 + x^39 + x^38 + x^37 + x^35 + x^33 + x^32 + x^31 + x^29 + x^27 +
 22  * x^24 + x^23 + x^22 + x^21 + x^19 + x^17 + x^13 + x^12 + x^10 + x^9 +
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| /linux/drivers/net/ethernet/chelsio/cxgb4/ | 
| H A D | t4_msg.h | 4  * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.16  *      - Redistributions of source code must retain the above
 20  *      - Redistributions in binary form must reproduce the above
 196 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S)  argument
 197 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF)  argument
 198 #define TID_G(x)    ((x) & 0xFFFFFF)  argument
 200 /* tid is assumed to be 24-bits */
 203 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
 211 #define TID_TID_V(x) ((x) << TID_TID_S)  argument
 212 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M)  argument
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| /linux/tools/lib/bpf/ | 
| H A D | bpf_endian.h | 1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */13 #define ___bpf_mvb(x, b, n, m) ((__u##b)(x) << (b-(n+1)*8) >> (b-8) << (m*8))  argument
 15 #define ___bpf_swab16(x) ((__u16)(			\  argument
 16 			  ___bpf_mvb(x, 16, 0, 1) |	\
 17 			  ___bpf_mvb(x, 16, 1, 0)))
 19 #define ___bpf_swab32(x) ((__u32)(			\  argument
 20 			  ___bpf_mvb(x, 32, 0, 3) |	\
 21 			  ___bpf_mvb(x, 32, 1, 2) |	\
 22 			  ___bpf_mvb(x, 32, 2, 1) |	\
 23 			  ___bpf_mvb(x, 32, 3, 0)))
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