Home
last modified time | relevance | path

Searched full:vf2 (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmotorcomm,yt8xxx.yaml91 This configuration is mainly to adapt to VF2 with JH7110 SoC.
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td989 defm : VPatExtendSDNode_V<[zext, anyext], "PseudoVZEXT", "VF2",
991 defm : VPatExtendSDNode_V<[sext], "PseudoVSEXT", "VF2",
H A DRISCVInstrInfoV.td1140 defm VZEXT_VF2 : VALU_MV_VS2<"vzext.vf2", 0b010010, 0b00110>;
1141 defm VSEXT_VF2 : VALU_MV_VS2<"vsext.vf2", 0b010010, 0b00111>;
H A DRISCVInstrInfoVVLPatterns.td2250 defm : VPatExtendVL_V<riscv_zext_vl, "PseudoVZEXT", "VF2",
2252 defm : VPatExtendVL_V<riscv_sext_vl, "PseudoVSEXT", "VF2",
H A DRISCVInstrInfoVPseudos.td178 // Use for zext/sext.vf2
6865 defm : VPatUnaryV_VF<"int_riscv_vzext", "PseudoVZEXT", "VF2",
6871 defm : VPatUnaryV_VF<"int_riscv_vsext", "PseudoVSEXT", "VF2",
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td435 (add VF2, VF3, VF4, VF5, VF0, VF1, VF6, VF7,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td234 def W2 : Rd< 4, "v5:4", [V4, V5, VF2]>, DwarfRegNum<[103]>;
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp4377 // [(load, vf1), (load, vf2), (store, vf1)] in emitInvalidCostRemarks()
4379 // load (vf1, vf2) in emitInvalidCostRemarks()
4391 // [(load, vf1), (load, vf2))] in emitInvalidCostRemarks()
4393 // remark: invalid costs for 'load' at VF=(vf, vf2) in emitInvalidCostRemarks()
/freebsd/share/misc/
H A Dpci_vendors25238 0758 mE5 marathon VF2