/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | xilinx-xadc.txt | 4 as the UltraScale/UltraScale+ System Monitor. 14 The Xilinx System Monitor is an ADC that is found in the UltraScale and 15 UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for 29 UltraScale and UltraScale+ System Monitor.
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H A D | xlnx,zynqmp-ams.yaml | 7 title: Xilinx Zynq Ultrascale AMS controller
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/linux/arch/microblaze/kernel/cpu/ |
H A D | cpuinfo.c | 79 {"UltraScale Virtex", 0x13}, 80 {"UltraScale Kintex", 0x14}, 81 {"UltraScale+ Zynq", 0x15}, 82 {"UltraScale+ Virtex", 0x16}, 83 {"UltraScale+ Kintex", 0x17},
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/linux/Documentation/devicetree/bindings/reset/ |
H A D | xlnx,zynqmp-reset.yaml | 7 title: Zynq UltraScale+ MPSoC and Versal reset 14 The Zynq UltraScale+ MPSoC and Versal has several different resets. 25 For list of all valid reset indices for Zynq UltraScale+ MPSoC
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/linux/drivers/clk/zynqmp/ |
H A D | Kconfig | 4 bool "Support for Xilinx ZynqMP Ultrascale+ clock controllers" 8 Support for the Zynqmp Ultrascale clock controller.
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H A D | Makefile | 2 # Zynq Ultrascale+ MPSoC clock specific Makefile
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H A D | clk-gate-zynqmp.c | 3 * Zynq UltraScale+ MPSoC clock controller
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H A D | clk-mux-zynqmp.c | 3 * Zynq UltraScale+ MPSoC mux
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H A D | clkc.c | 3 * Zynq UltraScale+ MPSoC clock controller 675 pr_err("Zynq Ultrascale+ MPSoC clk %s: register failed with %ld\n", in zynqmp_register_clocks()
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H A D | divider.c | 3 * Zynq UltraScale+ MPSoC Divider support
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H A D | pll.c | 3 * Zynq UltraScale+ MPSoC PLL driver
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/linux/Documentation/devicetree/bindings/fpga/ |
H A D | xlnx,zynqmp-pcap-fpga.yaml | 7 title: Xilinx Zynq Ultrascale MPSoC FPGA Manager 13 Device Tree Bindings for Zynq Ultrascale MPSoC FPGA Manager.
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/linux/Documentation/devicetree/bindings/display/xlnx/ |
H A D | xlnx,zynqmp-dpsub.yaml | 10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC) 40 Please refer to "Zynq UltraScale+ Device Technical Reference Manual" 41 (https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf)
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/linux/Documentation/devicetree/bindings/net/ |
H A D | cdns,macb.yaml | 24 - cdns,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC 32 - xlnx,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC
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/linux/Documentation/misc-devices/ |
H A D | xilinx_sdfec.rst | 10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs. 12 .. |Ultrascale+ (TM)| unicode:: Ultrascale+ U+2122
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/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | xlnx,zynqmp-nvmem.yaml | 7 title: Zynq UltraScale+ MPSoC Non Volatile Memory interface
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/linux/drivers/iio/adc/ |
H A D | Kconfig | 1662 UltraScale/UltraScale+ System Management Wizard. 1669 UltraScale and UltraScale+ FPGAs. 1679 Say yes here to have support for the Xilinx AMS for Ultrascale/Ultrascale+ 1683 The driver supports Voltage and Temperature monitoring on Xilinx Ultrascale
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H A D | xilinx-xadc-core.c | 101 /* UltraScale */ 587 * Values below are for UltraScale+ (SYSMONE4) using internal reference. 588 * See https://docs.xilinx.com/v/u/en-US/ug580-ultrascale-sysmon 776 * UltraScale, but as per reality setting the power-down bit for the in xadc_power_adc_b() 802 /* UltraScale has only one ADC and supports only continuous mode */ in xadc_get_seq_mode() 1133 /* UltraScale */
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/linux/Documentation/devicetree/bindings/rtc/ |
H A D | xlnx,zynqmp-rtc.yaml | 7 title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-driver-zynqmp-fpga | 9 https://docs.xilinx.com/v/u/en-US/ug570-ultrascale-configuration
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/linux/Documentation/devicetree/bindings/soc/xilinx/ |
H A D | xilinx.yaml | 13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
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/linux/Documentation/devicetree/bindings/firmware/xilinx/ |
H A D | xlnx,zynqmp-firmware.yaml | 23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
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/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | xlnx,zynqmp-ipi-mailbox.yaml | 11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
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/linux/drivers/rtc/ |
H A D | rtc-zynqmp.c | 3 * Xilinx Zynq Ultrascale+ MPSoC Real Time Clock Driver
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/linux/drivers/mtd/nand/raw/ |
H A D | Kconfig | 414 Zynq Ultrascale+ MPSoC.
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