| /linux/drivers/iommu/ |
| H A D | ipmmu-vmsa.c | 131 /* uTLB registers */
238 unsigned int utlb, u32 data) in ipmmu_imuasid_write() argument
240 ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb)), data); in ipmmu_imuasid_write()
244 unsigned int utlb, u32 data) in ipmmu_imuctr_write() argument
246 ipmmu_write(mmu, ipmmu_utlb_reg(mmu, IMUCTR(utlb)), data); in ipmmu_imuctr_write()
280 unsigned int utlb) in ipmmu_utlb_enable() argument
290 ipmmu_imuasid_write(mmu, utlb, 0); in ipmmu_utlb_enable()
292 ipmmu_imuctr_write(mmu, utlb, IMUCTR_TTSEL_MMU(domain->context_id) | in ipmmu_utlb_enable()
294 mmu->utlb_ctx[utlb] = domain->context_id; in ipmmu_utlb_enable()
301 unsigned int utlb) in ipmmu_utlb_disable() argument
[all …]
|
| /linux/tools/perf/pmu-events/arch/riscv/thead/c900-legacy/ |
| H A D | cache.json | 15 "BriefDescription": "I-UTLB miss"
20 "BriefDescription": "D-UTLB miss"
|
| /linux/arch/arm/mm/ |
| H A D | tlb-fa.S | 44 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry
58 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate UTLB entry
|
| H A D | proc-fa526.S | 117 mcr p15, 0, ip, c8, c7, 0 @ invalidate UTLB
|
| /linux/arch/csky/mm/ |
| H A D | tlb.c | 41 * need change asid field to invalid I-utlb & D-utlb.
|
| /linux/tools/perf/pmu-events/arch/riscv/sifive/u74/ |
| H A D | memory.json | |
| /linux/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_issues.h | 30 /* uTLB deadlock could occur when writing to an invalid page at the
31 * same time as access to a valid page in the same uTLB cache line ( ==
|
| /linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | perf_event.c | 69 * 0x0220 UTLB miss caused by instruction fetch
70 * 0x0222 UTLB miss caused by operand access
|
| /linux/arch/sh/mm/ |
| H A D | tlb-pteaex.c | 64 * While SH-X2 extended TLB mode splits out the memory-mapped I/UTLB
|
| H A D | tlbflush_32.c | 131 * and will tear down all of the UTLB/ITLB mappings, including in __flush_tlb_global()
|
| H A D | tlb-debugfs.c | 154 debugfs_create_file("utlb", S_IRUSR, arch_debugfs_dir, in tlb_debugfs_init()
|
| /linux/arch/mips/include/asm/sn/ |
| H A D | launch.h | 75 volatile char *bevutlb;/* Address of bev utlb ex handler */
|
| H A D | gda.h | 51 void **g_hooked_utlb;/* ptr to pda loc for utlb hndlr */
|
| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_gen4_tl.h | 56 * @reg_tl_at_max_tlb_used: maximum uTLB used
|
| H A D | adf_gen4_tl.c | 57 /* Maximum uTLB used. */
|
| /linux/drivers/gpu/drm/nouveau/include/nvhw/class/ |
| H A D | clc36f.h | 11 // specifying the page address for a targeted TLB invalidate and the uTLB for
|
| /linux/arch/microblaze/include/asm/ |
| H A D | mmu.h | 67 * known as the UTLB and ITLB, respectively.
|
| H A D | pgtable.h | 79 * known as the UTLB and ITLB, respectively (see "mmu.h" for definitions).
|
| /linux/tools/perf/pmu-events/arch/x86/goldmont/ |
| H A D | pipeline.json | 294 … "BriefDescription": "Loads blocked because address in not in the UTLB (Precise event capable)",
299 …nts loads blocked because they are unable to find their physical address in the micro TLB (UTLB).",
|
| /linux/tools/perf/pmu-events/arch/x86/goldmontplus/ |
| H A D | pipeline.json | 304 … "BriefDescription": "Loads blocked because address in not in the UTLB (Precise event capable)",
309 …nts loads blocked because they are unable to find their physical address in the micro TLB (UTLB).",
|
| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | riscv,pmu.yaml | 145 /* LL_READ_MISS -> UTLB miss */
|
| /linux/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 41 * 0x03 UTLB miss
|
| H A D | sq.c | 205 * the kernel page table and discards the UTLB translation.
|
| /linux/tools/perf/pmu-events/arch/x86/silvermont/ |
| H A D | cache.json | 103 "BriefDescription": "Loads missed UTLB",
107 "PublicDescription": "This event counts the number of load ops retired that had UTLB miss.",
|
| /linux/arch/mips/include/asm/ |
| H A D | sgiarcs.h | 257 _PLONG utlbvect; /* XXX UTLB vector??? */
|