/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1028a-qds-13bb.dtso | 28 phy-mode = "usxgmii"; 63 phy-mode = "usxgmii"; 70 phy-mode = "usxgmii"; 77 phy-mode = "usxgmii"; 84 phy-mode = "usxgmii";
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H A D | fsl-lx2160a-bluebox3.dts | 58 phy-mode = "usxgmii"; 64 phy-mode = "usxgmii"; 70 phy-mode = "usxgmii"; 76 phy-mode = "usxgmii";
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H A D | fsl-lx2160a-rdb.dts | 42 phy-connection-type = "usxgmii"; 48 phy-connection-type = "usxgmii";
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j784s4-evm-usxgmii-exp1-exp2.dtso | 3 * DT Overlay for CPSW9G in dual port fixed-link USXGMII mode using ENET-1 32 phy-mode = "usxgmii"; 44 phy-mode = "usxgmii"; 56 assigned-clock-parents = <&k3_clks 406 9>; /* Use 156.25 MHz clock for USXGMII */
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H A D | Makefile | 130 dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm-usxgmii-exp1-exp2.dtbo 211 k3-j784s4-evm-usxgmii-exp1-exp2-dtbs := k3-j784s4-evm.dtb \ 212 k3-j784s4-evm-usxgmii-exp1-exp2.dtbo 240 k3-j784s4-evm-usxgmii-exp1-exp2.dtb
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | mediatek,mt7988-xfi-tphy.yaml | 14 used by the (10G/5G) USXGMII PCS and (1G/2.5G) LynxI PCS found in 39 mediatek,usxgmii-performance-errata: 75 mediatek,usxgmii-performance-errata;
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H A D | transmit-amplitude.yaml | 48 - usxgmii
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/linux/drivers/clk/mediatek/ |
H A D | clk-mt7988-xfipll.c | 15 /* Register to control USXGMII XFI PLL analog */ 58 /* Apply software workaround for USXGMII PLL TCL issue */ in clk_mt7988_xfipll_probe()
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/linux/Documentation/devicetree/bindings/net/ |
H A D | nvidia,tegra234-mgbe.yaml | 84 - usxgmii 149 phy-mode = "usxgmii";
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H A D | ethernet-controller.yaml | 103 - usxgmii
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/linux/drivers/net/pcs/ |
H A D | pcs-lynx.c | 159 dev_err(&pcs->dev, "USXGMII only supports in-band AN for now\n"); in lynx_pcs_config_usxgmii() 163 /* Configure device ability for the USXGMII Replicator */ in lynx_pcs_config_usxgmii() 299 /* At the moment, only in-band AN is supported for USXGMII in lynx_pcs_link_up()
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/linux/include/uapi/linux/ |
H A D | mdio.h | 466 /* UsxgmiiChannelInfo[15:0] for USXGMII in-band auto-negotiation.*/ 469 #define MDIO_USXGMII_SPD_MASK 0x0e00 /* USXGMII speed mask */ 470 #define MDIO_USXGMII_FULL_DUPLEX 0x1000 /* USXGMII full duplex */ 471 #define MDIO_USXGMII_DPX_SPD_MASK 0x1e00 /* USXGMII duplex and speed bits */
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/linux/drivers/phy/mediatek/ |
H A D | Kconfig | 25 via the USXGMII PCS found in MediaTek SoCs with 10G Ethernet.
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/linux/Documentation/devicetree/bindings/net/pcs/ |
H A D | snps,dw-xpcs.yaml | 15 the Media Independent Interface (XGMII, USXGMII, XLGMII, GMII, etc)
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/linux/drivers/net/ethernet/freescale/dpaa2/ |
H A D | dpmac.h | 50 * @DPMAC_ETH_IF_USXGMII: USXGMII interface
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/linux/Documentation/devicetree/bindings/net/dsa/ |
H A D | mscc,ocelot.yaml | 53 - phy-mode = "usxgmii": on ports 0, 1, 2, 3
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/linux/Documentation/networking/ |
H A D | phy.rst | 331 Represents the 10G-QXGMII PHY-MAC interface as defined by the Cisco USXGMII 334 through symbol replication. The PCS expects the standard USXGMII code word.
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/linux/drivers/net/phy/ |
H A D | phylink.c | 1873 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching in phylink_validate_phy() 3549 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3551 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3553 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3554 * code word. Decode the USXGMII code word and populate the corresponding fields 3599 * word is the same as the USXGMII word, except it only supports speeds up to
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H A D | mxl-gpy.c | 546 /* Interface mode is fixed for USXGMII and integrated PHY */ in gpy_update_interface()
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H A D | marvell10g.c | 992 * In USXGMII mode the PHY interface mode is also fixed. in mv3310_update_interface()
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/linux/drivers/net/dsa/mv88e6xxx/ |
H A D | pcs-639x.c | 907 "can't read USXGMII status: %pe\n", ERR_PTR(err)); in mv88e6393x_xg_pcs_get_state()
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/linux/drivers/net/phy/aquantia/ |
H A D | aquantia_main.c | 601 …ut of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n"); in aqr107_config_init()
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/linux/include/linux/ |
H A D | phy.h | 131 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII 287 return "usxgmii"; in phy_modes()
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/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | cgx.c | 59 [LMAC_MODE_USXGMII] = "USXGMII",
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