Searched full:usbcmd (Results 1 – 7 of 7) sorted by relevance
34 - description: interrupt used to wake up core, e.g when usbcmd.rs is
78 before starting controller using usbcmd run/stop bit.
48 aligned with ITC bits at register USBCMD.
44 should be aligned with ITC bits at register USBCMD.
206 uint32_t usbcmd; /* usb command */ member385 do_intr = (sc->opregs.usbcmd & XHCI_CMD_RS) == 0; in pci_xhci_usbcmd_write()387 sc->opregs.usbcmd |= XHCI_CMD_RS; in pci_xhci_usbcmd_write()425 sc->opregs.usbcmd &= ~XHCI_CMD_RS; in pci_xhci_usbcmd_write()431 cmd |= sc->opregs.usbcmd & XHCI_CMD_RS; in pci_xhci_usbcmd_write()634 if ((sc->opregs.usbcmd & XHCI_CMD_INTE) && in pci_xhci_assert_interrupt()2235 sc->opregs.usbcmd = pci_xhci_usbcmd_write(sc, value & 0x3F0F); in pci_xhci_hostop_write()2393 value = sc->opregs.usbcmd; in pci_xhci_hostop_read()2665 (sc->opregs.usbcmd & XHCI_CMD_RS) == 0 || in pci_xhci_dev_intr()3094 SNAPSHOT_VAR_OR_LEAVE(sc->opregs.usbcmd, meta, ret, done); in pci_xhci_snapshot()
131 * Offsets from USBCMD register, little-endian access.
271 * ports to be taken out of suspend when the USBCMD.Run/Stop bit is cleared in omap_uhh_init()