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/linux/drivers/scsi/qla4xxx/
H A Dql4_dbg.c83 (uint8_t) offsetof(struct isp_reg, u2.isp4010.ext_hw_conf), in qla4xxx_dump_registers()
84 readw(&ha->reg->u2.isp4010.ext_hw_conf)); in qla4xxx_dump_registers()
86 (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_ctrl), in qla4xxx_dump_registers()
87 readw(&ha->reg->u2.isp4010.port_ctrl)); in qla4xxx_dump_registers()
89 (uint8_t) offsetof(struct isp_reg, u2.isp4010.port_status), in qla4xxx_dump_registers()
90 readw(&ha->reg->u2.isp4010.port_status)); in qla4xxx_dump_registers()
92 (uint8_t) offsetof(struct isp_reg, u2.isp4010.req_q_out), in qla4xxx_dump_registers()
93 readw(&ha->reg->u2.isp4010.req_q_out)); in qla4xxx_dump_registers()
95 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out), in qla4xxx_dump_registers()
96 readw(&ha->reg->u2.isp4010.gp_out)); in qla4xxx_dump_registers()
[all …]
H A Dql4_def.h943 &ha->reg->u2.isp4010.ext_hw_conf : in isp_ext_hw_conf()
944 &ha->reg->u2.isp4022.p0.ext_hw_conf); in isp_ext_hw_conf()
950 &ha->reg->u2.isp4010.port_status : in isp_port_status()
951 &ha->reg->u2.isp4022.p0.port_status); in isp_port_status()
957 &ha->reg->u2.isp4010.port_ctrl : in isp_port_ctrl()
958 &ha->reg->u2.isp4022.p0.port_ctrl); in isp_port_ctrl()
964 &ha->reg->u2.isp4010.port_err_status : in isp_port_error_status()
965 &ha->reg->u2.isp4022.p0.port_err_status); in isp_port_error_status()
971 &ha->reg->u2.isp4010.gp_out : in isp_gp_out()
972 &ha->reg->u2.isp4022.p0.gp_out); in isp_gp_out()
/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,tphy.yaml24 u2 port0 0x0800 U2PHY_COM
29 u2 port1 0x1000 U2PHY_COM
34 u2 port2 0x1800 U2PHY_COM
39 u2 port0 0x0000 MISC
48 u2 port1 0x1000 MISC
57 u2 port2 0x2000 MISC
60 SPLLC shared by u3 ports and FMREG shared by u2 ports on V1 are put back
61 into each port; a new bank MISC for u2 ports and CHIP for u3 ports are
171 - description: internal R efuse for U2 PHY or U3/PCIe PHY
176 Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
[all …]
H A Dmediatek,xsphy.yaml20 u2 port0 0x0000 MISC
23 u2 port1 0x1000 MISC
26 u2 port2 0x2000 MISC
57 if only U2 ports provided, shouldn't use the property.
113 The value of slew rate calibrate (U2 phy)
120 The selection of VRT reference voltage (U2 phy)
127 The selection of HS_TX TERM reference voltage (U2 phy)
134 The selection of Internal Resistor (U2/U3 phy)
/linux/include/linux/
H A Duuid.h46 static inline bool guid_equal(const guid_t *u1, const guid_t *u2) in guid_equal() argument
48 return memcmp(u1, u2, sizeof(guid_t)) == 0; in guid_equal()
71 static inline bool uuid_equal(const uuid_t *u1, const uuid_t *u2) in uuid_equal() argument
73 return memcmp(u1, u2, sizeof(uuid_t)) == 0; in uuid_equal()
/linux/fs/smb/server/mgmt/
H A Duser_config.c100 bool ksmbd_compare_user(struct ksmbd_user *u1, struct ksmbd_user *u2) in ksmbd_compare_user() argument
102 if (strcmp(u1->name, u2->name)) in ksmbd_compare_user()
104 if (memcmp(u1->passkey, u2->passkey, u1->passkey_sz)) in ksmbd_compare_user()
H A Duser_config.h69 bool ksmbd_compare_user(struct ksmbd_user *u1, struct ksmbd_user *u2);
/linux/crypto/
H A Decdsa.c92 u64 u2[ECC_MAX_DIGITS]; in _ecdsa_verify() local
110 /* u2 = (r * s1) mod n */ in _ecdsa_verify()
111 vli_mod_mult_slow(u2, r, s1, curve->n, ndigits); in _ecdsa_verify()
112 /* res = u1*G + u2 * pub_key */ in _ecdsa_verify()
113 ecc_point_mult_shamir(&res, u1, &curve->g, u2, &ctx->pub_key, curve); in _ecdsa_verify()
/linux/drivers/media/rc/keymaps/
H A Drc-kaiomy.c11 /* Kaiomy TVnPC U2
84 MODULE_DESCRIPTION("Kaiomy TVnPC U2 remote controller keytable");
/linux/drivers/usb/mtu3/
H A Dmtu3_host.c186 /* power on and enable all u2 ports */ in ssusb_host_enable()
222 /* power down and disable u2 ports except skipped ones */ in ssusb_host_disable()
267 /* power on all u2 ports except skipped ones */ in ssusb_host_resume()
299 /* power down u2 ports except skipped ones */ in ssusb_host_suspend()
H A Dmtu3_core.c95 /* only port0 of U2/U3 supports device mode */
182 /* Clear U2 USB common interrupts status */ in mtu3_intr_status_clear()
212 /* Enable U2 common USB interrupts */ in mtu3_intr_enable()
277 /* disable LGO_U1/U2 by default */ in mtu3_csr_init()
280 /* enable accept LGO_U1/U2 link command from host */ in mtu3_csr_init()
285 /* automatically build U2 link when U3 detect fail */ in mtu3_csr_init()
297 /* reset: u2 - data toggle, u3 - SeqN, flow control status etc */
660 /* U2/U3 detected by HW */ in mtu3_regs_init()
869 mtu->u3_capable ? "U3" : "U2"); in mtu3_hw_init()
H A Dmtu3_dr.c39 /* 1. power off and disable u2 port0 */ in ssusb_port0_switch()
44 /* 2. power on, enable u2 port0 and select its mode */ in ssusb_port0_switch()
/linux/include/uapi/linux/usb/
H A Dch9.h153 #define USB_DEVICE_U2_ENABLE 49 /* dev may initiate U2 transition */
174 #define USB_DEV_STAT_U2_ENABLED 3 /* transition into U2 state */
1236 * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2.
1237 * 0xff means the parent hub will accept transitions to U2, but will not
1240 * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to
1241 * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2
1259 * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each
/linux/arch/powerpc/include/asm/
H A Duninorth.h5 * This also includes U2 used on more recent MacRISC2/3
109 #define UNI_N_VERSION_INTREPID 0x00D2 /* Integrated U2 + K */
117 #define UNI_N_CLOCK_CNTL_ATA100 0x00000010 /* ATA-100 clock control (U2) */
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12a-u200.dts27 sound-name-prefix = "10U2";
236 "10U2 INL", "ACODEC LOLP",
237 "10U2 INR", "ACODEC LORP",
238 "Lineout", "10U2 OUTL",
239 "Lineout", "10U2 OUTR";
/linux/drivers/usb/cdns3/
H A Dcdns3-gadget.h177 /* U2 state entry enable (used in SS mode). */
179 /* U2 state entry disable (used in SS mode). */
185 /* U2 state entry request (used in SS mode). */
338 * U2 state enable status (used in SS mode).
339 * 0 - Entering to U2 state disabled.
340 * 1 - Entering to U2 state enabled.
364 * 1 - DMA clock turn-off in U1, U2 and U3 (SS mode) is enabled.
441 /* SS link U2 state enter interrupt enable.*/
443 /* SS link U2 state exit interrupt enable.*/
494 /* U2 link state enter detected.*/
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-usb115 and U2 exit latencies have been set in the BOS descriptor; if
121 or not USB3 hardware LPM U1 or U2 is enabled for the device.
226 values are "0" if both u1 and u2 are NOT permitted, "u1" if only u1
227 is permitted, "u2" if only u2 is permitted, "u1_u2" if both u1 and
228 u2 are permitted.
/linux/drivers/parisc/
H A DKconfig24 bool "U2/Uturn I/O MMU"
29 U2/Uturn chip in "Virtual Mode" and use the I/O MMU.
/linux/drivers/infiniband/core/
H A Duverbs_ioctl.c187 if (array_len < spec->u2.objs_arr.min_len || in uverbs_process_idrs_array()
188 array_len > spec->u2.objs_arr.max_len) in uverbs_process_idrs_array()
216 spec->u2.objs_arr.obj_type, spec->u2.objs_arr.access, in uverbs_process_idrs_array()
239 spec->u2.objs_arr.access, false, commit, in uverbs_free_idrs_array()
262 val_spec = &spec->u2.enum_def.ids[uattr->attr_data.enum_data.elem_id]; in uverbs_process_attr()
/linux/include/rdma/
H A Duverbs_ioctl.h102 } u2; member
497 .u2.objs_arr.obj_type = _idr_type, \
498 .u2.objs_arr.access = _access, \
499 .u2.objs_arr.min_len = _min_len, \
500 .u2.objs_arr.max_len = _max_len, \
551 .u2.enum_def.ids = _enum_arr, \
/linux/drivers/crypto/intel/qat/qat_common/
H A Dicp_qat_fw_la.h303 } u2; member
314 } u2; member
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-io1v8.dtsi9 /* Enpirion EP3A8LQI U2 on the DHCOR */
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-iot2050-usb3.dtsi26 snps,dis-u2-entry-quirk;
/linux/arch/parisc/include/asm/
H A Ddma-mapping.h11 ** b) U2/Uturn cachable host memory NOP
/linux/arch/arm/kernel/
H A Datags_compat.c77 } u2; member
213 build_tag_list(params, &params->u2); in convert_to_tag_list()

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