| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.h | 122 #define DCCG_REG_FIELD_LIST(type) \ argument
123 type DPPCLK0_DTO_PHASE;\
124 type DPPCLK0_DTO_MODULO;\
125 type DPPCLK_DTO_ENABLE[6];\
126 type DPPCLK_DTO_DB_EN[6];\
127 type REFCLK_CLOCK_EN;\
128 type REFCLK_SRC_SEL;\
129 type DISPCLK_STEP_DELAY;\
130 type DISPCLK_STEP_SIZE;\
131 type DISPCLK_FREQ_RAMP_DONE;\
[all …]
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| /linux/Documentation/netlink/specs/ |
| H A D | nl80211.yaml | 12 type: enum
172 type: flags
207 name: channel-type
208 type: enum
216 type: struct
220 type: u32
223 type: u32
226 type: flags
239 type: u32
242 type: string
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| H A D | rt-link.yaml | 14 type: flags
59 type: enum
70 type: struct
74 type: u8
77 type: struct
81 type: u8
84 type: pad
87 name: ifi-type
88 type: u16
91 type: s32
[all …]
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| H A D | rt-route.yaml | 13 name: rtm-type
16 type: enum
32 type: struct
36 type: u8
39 type: u8
42 type: u8
45 type: u8
48 type: u8
51 type: u8
54 type: u8
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| H A D | nfsd.yaml | 11 type: flags
12 name: cache-type
15 type: flags
38 type: flags
51 name: cache-type
52 type: u32
53 enum: cache-type
59 type: u32
63 type: u32
66 type: u32
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.h | 409 #define DWBC_REG_FIELD_LIST_DCN3_0(type) \ argument
410 type DWB_ENABLE;\
411 type DISPCLK_R_DWB_GATE_DIS;\
412 type DISPCLK_G_DWB_GATE_DIS;\
413 type DWB_TEST_CLK_SEL;\
414 type DWBSCL_LUT_MEM_PWR_FORCE;\
415 type DWBSCL_LUT_MEM_PWR_DIS;\
416 type DWBSCL_LUT_MEM_PWR_STATE;\
417 type DWBSCL_LB_MEM_PWR_FORCE;\
418 type DWBSCL_LB_MEM_PWR_DIS;\
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/ |
| H A D | dcn20_mmhubbub.h | 252 #define MCIF_WB_REG_FIELD_LIST_DCN2_0(type) \ argument
253 type MCIF_WB_BUFMGR_ENABLE;\
254 type MCIF_WB_BUFMGR_SW_INT_EN;\
255 type MCIF_WB_BUFMGR_SW_INT_ACK;\
256 type MCIF_WB_BUFMGR_SW_SLICE_INT_EN;\
257 type MCIF_WB_BUFMGR_SW_OVERRUN_INT_EN;\
258 type MCIF_WB_BUFMGR_SW_LOCK;\
259 type MCIF_WB_P_VMID;\
260 type MCIF_WB_BUF_ADDR_FENCE_EN;\
261 type MCIF_WB_BUFMGR_CUR_LINE_R;\
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dwb.h | 202 #define DWBC_REG_FIELD_LIST_DCN2_0(type) \ argument
203 type WB_ENABLE;\
204 type DISPCLK_R_WB_GATE_DIS;\
205 type DISPCLK_G_WB_GATE_DIS;\
206 type DISPCLK_G_WBSCL_GATE_DIS;\
207 type WB_TEST_CLK_SEL;\
208 type WB_LB_LS_DIS;\
209 type WB_LB_SD_DIS;\
210 type WB_LUT_LS_DIS;\
211 type WBSCL_LB_MEM_PWR_MODE_SEL;\
[all …]
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| /linux/drivers/net/ethernet/microchip/vcap/ |
| H A D | vcap_model_kunit.c | 19 .type = VCAP_FIELD_U32,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U32,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_U32,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
[all …]
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| /linux/tools/testing/selftests/drivers/net/netdevsim/ |
| H A D | hw_stats_l3.sh | 85 local type=$1; shift
89 echo $ifindex > $(DEBUGFS_DIR $instance)/hwstats/$type/$action
127 $IP link add name dummy1 type dummy
147 local type=$1; shift
156 local type=$1; shift
158 [[ $(netdev_hwstats_used $netdev $type) == "true" ]]
164 local type=$1; shift
166 [[ $(netdev_hwstats_used $netdev $type) == "false" ]]
172 local type=$1; shift
175 jq ".[].info.${type}_stats.request"
[all …]
|
| /linux/arch/riscv/include/asm/ |
| H A D | gdb_xml.h | 26 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>"
27 "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>"
28 "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>"
29 "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>"
30 "<reg name=\""DBG_REG_TP"\" bitsize=\"64\" type=\"data_ptr\"/>"
31 "<reg name=\""DBG_REG_T0"\" bitsize=\"64\" type=\"int\"/>"
32 "<reg name=\""DBG_REG_T1"\" bitsize=\"64\" type=\"int\"/>"
33 "<reg name=\""DBG_REG_T2"\" bitsize=\"64\" type=\"int\"/>"
34 "<reg name=\""DBG_REG_FP"\" bitsize=\"64\" type=\"data_ptr\"/>"
35 "<reg name=\""DBG_REG_S1"\" bitsize=\"64\" type=\"int\"/>"
[all …]
|
| /linux/Documentation/netlink/ |
| H A D | genetlink-c.yaml | 10 type: integer
13 type: [ string, integer ]
17 # literal int, const name, or limit based on fixed-width type
19 type: [ string, integer ]
26 type: object
32 type: string
34 type: string
40 type: string
44 type: string
47 type: string
[all …]
|
| H A D | genetlink-legacy.yaml | 10 type: string
13 type: integer
16 type: [ string, integer ]
20 # literal int, const name, or limit based on fixed-width type
22 type: [ string, integer ]
29 type: object
35 type: string
37 type: string
43 type: string
47 type: string
[all …]
|
| H A D | netlink-raw.yaml | 10 type: string
13 type: string
16 type: integer
19 type: [ string, integer ]
23 # literal int, const name, or limit based on fixed-width type
25 type: [ string, integer ]
32 type: object
38 type: string
40 type: string
47 type: integer
[all …]
|
| H A D | genetlink.yaml | 10 type: string
13 type: integer
16 type: [ string, integer ]
20 # literal int, const name, or limit based on fixed-width type
22 type: [ string, integer ]
29 type: object
37 type: string
43 type: string
46 description: List of type and constant definitions (enums, flags, defines).
47 type: array
[all …]
|
| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_vcap_ag_api.c | 19 .type = VCAP_FIELD_BIT,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U72,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_BIT,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
[all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_vcap_ag_api.c | 18 .type = VCAP_FIELD_BIT,
23 .type = VCAP_FIELD_BIT,
28 .type = VCAP_FIELD_U32,
33 .type = VCAP_FIELD_U32,
38 .type = VCAP_FIELD_U32,
43 .type = VCAP_FIELD_U72,
48 .type = VCAP_FIELD_BIT,
53 .type = VCAP_FIELD_BIT,
58 .type = VCAP_FIELD_U32,
63 .type = VCAP_FIELD_U32,
[all …]
|
| /linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_vcap_ag_api.c | 11 .type = VCAP_FIELD_BIT,
16 .type = VCAP_FIELD_U32,
21 .type = VCAP_FIELD_U32,
26 .type = VCAP_FIELD_BIT,
31 .type = VCAP_FIELD_BIT,
36 .type = VCAP_FIELD_BIT,
41 .type = VCAP_FIELD_BIT,
46 .type = VCAP_FIELD_BIT,
51 .type = VCAP_FIELD_BIT,
56 .type = VCAP_FIELD_BIT,
[all …]
|
| /linux/net/ieee802154/ |
| H A D | nl_policy.c | 15 [IEEE802154_ATTR_DEV_NAME] = { .type = NLA_STRING, },
16 [IEEE802154_ATTR_DEV_INDEX] = { .type = NLA_U32, },
17 [IEEE802154_ATTR_PHY_NAME] = { .type = NLA_STRING, },
19 [IEEE802154_ATTR_STATUS] = { .type = NLA_U8, },
20 [IEEE802154_ATTR_SHORT_ADDR] = { .type = NLA_U16, },
21 [IEEE802154_ATTR_HW_ADDR] = { .type = NLA_HW_ADDR, },
22 [IEEE802154_ATTR_PAN_ID] = { .type = NLA_U16, },
23 [IEEE802154_ATTR_CHANNEL] = { .type = NLA_U8, },
24 [IEEE802154_ATTR_BCN_ORD] = { .type = NLA_U8, },
25 [IEEE802154_ATTR_SF_ORD] = { .type = NLA_U8, },
[all …]
|
| /linux/drivers/gpu/drm/msm/registers/display/ |
| H A D | mdp4.xml | 66 <bitfield name="PIPE0" low="0" high="2" type="mdp_mixer_stage_id"/>
67 <bitfield name="PIPE0_MIXER1" pos="3" type="boolean"/>
68 <bitfield name="PIPE1" low="4" high="6" type="mdp_mixer_stage_id"/>
69 <bitfield name="PIPE1_MIXER1" pos="7" type="boolean"/>
70 <bitfield name="PIPE2" low="8" high="10" type="mdp_mixer_stage_id"/>
71 <bitfield name="PIPE2_MIXER1" pos="11" type="boolean"/>
72 <bitfield name="PIPE3" low="12" high="14" type="mdp_mixer_stage_id"/>
73 <bitfield name="PIPE3_MIXER1" pos="15" type="boolean"/>
74 <bitfield name="PIPE4" low="16" high="18" type="mdp_mixer_stage_id"/>
75 <bitfield name="PIPE4_MIXER1" pos="19" type="boolean"/>
[all …]
|
| H A D | edp.xml | 23 <bitfield name="ENABLE" pos="0" type="boolean"/>
24 <bitfield name="RESET" pos="1" type="boolean"/>
28 <bitfield name="TRAIN_PATTERN_1" pos="0" type="boolean"/>
29 <bitfield name="TRAIN_PATTERN_2" pos="1" type="boolean"/>
30 <bitfield name="TRAIN_PATTERN_3" pos="2" type="boolean"/>
31 <bitfield name="SYMBOL_ERR_RATE_MEAS" pos="3" type="boolean"/>
32 <bitfield name="PRBS7" pos="4" type="boolean"/>
33 <bitfield name="CUSTOM_80_BIT_PATTERN" pos="5" type="boolean"/>
34 <bitfield name="SEND_VIDEO" pos="6" type="boolean"/>
35 <bitfield name="PUSH_IDLE" pos="7" type="boolean"/>
[all …]
|
| /linux/net/devlink/ |
| H A D | netlink_gen.c | 50 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
51 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
56 [DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR] = { .type = NLA_BINARY, },
64 [DEVLINK_RATE_TC_ATTR_BW] = { .type = NLA_U32, },
68 [DEVLINK_ATTR_SELFTEST_ID_FLASH] = { .type = NLA_FLAG, },
73 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
74 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
80 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
81 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
83 [DEVLINK_ATTR_PORT_INDEX] = { .type = NLA_U32, },
[all …]
|
| /linux/arch/powerpc/lib/ |
| H A D | feature-fixups-test.S | 227 #define MAKE_MACRO_TEST(TYPE) \ argument
228 globl(ftr_fixup_test_ ##TYPE##_macros) \
231 BEGIN_##TYPE##_SECTION \
235 END_##TYPE##_SECTION(0, 1) \
239 BEGIN_##TYPE##_SECTION \
243 END_##TYPE##_SECTION(0, 0) \
247 BEGIN_##TYPE##_SECTION \
250 BEGIN_##TYPE##_SECTION_NESTED(80) \
253 END_##TYPE##_SECTION_NESTED(0, 1, 80) \
256 END_##TYPE##_SECTION(0, 0) \
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.h | 148 #define DWBC_REG_FIELD_LIST(type) \ argument
149 type WB_ENABLE;\
150 type DISPCLK_R_WB_GATE_DIS;\
151 type DISPCLK_G_WB_GATE_DIS;\
152 type DISPCLK_G_WBSCL_GATE_DIS;\
153 type WB_LB_LS_DIS;\
154 type WB_LB_SD_DIS;\
155 type WB_LUT_LS_DIS;\
156 type CNV_WINDOW_CROP_EN;\
157 type CNV_STEREO_TYPE;\
[all …]
|
| /linux/scripts/ |
| H A D | extract_xc3028.pl | 163 # Firmware 0, type: BASE FW F8MHZ (0x00000003), id: (0000000000000000), size: 6635
166 write_le32(0x00000003); # Type
172 # Firmware 1, type: BASE FW F8MHZ MTS (0x00000007), id: (0000000000000000), size: 6635
175 write_le32(0x00000007); # Type
181 # Firmware 2, type: BASE FW FM (0x00000401), id: (0000000000000000), size: 6525
184 write_le32(0x00000401); # Type
190 # Firmware 3, type: BASE FW FM INPUT1 (0x00000c01), id: (0000000000000000), size: 6539
193 write_le32(0x00000c01); # Type
199 # Firmware 4, type: BASE FW (0x00000001), id: (0000000000000000), size: 6633
202 write_le32(0x00000001); # Type
[all …]
|