| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp.h | 479 #define TF_REG_FIELD_LIST(type) \ argument 480 type EXT_OVERSCAN_LEFT; \ 481 type EXT_OVERSCAN_RIGHT; \ 482 type EXT_OVERSCAN_BOTTOM; \ 483 type EXT_OVERSCAN_TOP; \ 484 type OTG_H_BLANK_START; \ 485 type OTG_H_BLANK_END; \ 486 type OTG_V_BLANK_START; \ 487 type OTG_V_BLANK_END; \ 488 type PIXEL_DEPTH; \ [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_link_encoder.h | 228 #define DCN_LINK_ENCODER_REG_FIELD_LIST(type) \ argument 229 type DIG_ENABLE;\ 230 type DIG_HPD_SELECT;\ 231 type DIG_MODE;\ 232 type DIG_FE_SOURCE_SELECT;\ 233 type DIG_CLOCK_PATTERN;\ 234 type DPHY_BYPASS;\ 235 type DPHY_ATEST_SEL_LANE0;\ 236 type DPHY_ATEST_SEL_LANE1;\ 237 type DPHY_ATEST_SEL_LANE2;\ [all …]
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| H A D | dcn10_stream_encoder.h | 355 #define SE_REG_FIELD_LIST_DCN1_0(type) \ argument 356 type AFMT_GENERIC_INDEX;\ 357 type AFMT_GENERIC_HB0;\ 358 type AFMT_GENERIC_HB1;\ 359 type AFMT_GENERIC_HB2;\ 360 type AFMT_GENERIC_HB3;\ 361 type AFMT_GENERIC_LOCK_STATUS;\ 362 type AFMT_GENERIC_CONFLICT;\ 363 type AFMT_GENERIC_CONFLICT_CLR;\ 364 type AFMT_GENERIC0_FRAME_UPDATE_PENDING;\ [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.h | 409 #define DWBC_REG_FIELD_LIST_DCN3_0(type) \ argument 410 type DWB_ENABLE;\ 411 type DISPCLK_R_DWB_GATE_DIS;\ 412 type DISPCLK_G_DWB_GATE_DIS;\ 413 type DWB_TEST_CLK_SEL;\ 414 type DWBSCL_LUT_MEM_PWR_FORCE;\ 415 type DWBSCL_LUT_MEM_PWR_DIS;\ 416 type DWBSCL_LUT_MEM_PWR_STATE;\ 417 type DWBSCL_LB_MEM_PWR_FORCE;\ 418 type DWBSCL_LB_MEM_PWR_DIS;\ [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/ |
| H A D | dcn20_mmhubbub.h | 252 #define MCIF_WB_REG_FIELD_LIST_DCN2_0(type) \ argument 253 type MCIF_WB_BUFMGR_ENABLE;\ 254 type MCIF_WB_BUFMGR_SW_INT_EN;\ 255 type MCIF_WB_BUFMGR_SW_INT_ACK;\ 256 type MCIF_WB_BUFMGR_SW_SLICE_INT_EN;\ 257 type MCIF_WB_BUFMGR_SW_OVERRUN_INT_EN;\ 258 type MCIF_WB_BUFMGR_SW_LOCK;\ 259 type MCIF_WB_P_VMID;\ 260 type MCIF_WB_BUF_ADDR_FENCE_EN;\ 261 type MCIF_WB_BUFMGR_CUR_LINE_R;\ [all …]
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| /linux/drivers/gpu/drm/msm/registers/display/ |
| H A D | dsi.xml | 76 <bitfield name="CMD_DMA_DONE" pos="0" type="boolean"/> 77 <bitfield name="MASK_CMD_DMA_DONE" pos="1" type="boolean"/> 78 <bitfield name="CMD_MDP_DONE" pos="8" type="boolean"/> 79 <bitfield name="MASK_CMD_MDP_DONE" pos="9" type="boolean"/> 80 <bitfield name="VIDEO_DONE" pos="16" type="boolean"/> 81 <bitfield name="MASK_VIDEO_DONE" pos="17" type="boolean"/> 82 <bitfield name="BTA_DONE" pos="20" type="boolean"/> 83 <bitfield name="MASK_BTA_DONE" pos="21" type="boolean"/> 84 <bitfield name="ERROR" pos="24" type="boolean"/> 85 <bitfield name="MASK_ERROR" pos="25" type="boolean"/> [all …]
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| H A D | mdp4.xml | 66 <bitfield name="PIPE0" low="0" high="2" type="mdp_mixer_stage_id"/> 67 <bitfield name="PIPE0_MIXER1" pos="3" type="boolean"/> 68 <bitfield name="PIPE1" low="4" high="6" type="mdp_mixer_stage_id"/> 69 <bitfield name="PIPE1_MIXER1" pos="7" type="boolean"/> 70 <bitfield name="PIPE2" low="8" high="10" type="mdp_mixer_stage_id"/> 71 <bitfield name="PIPE2_MIXER1" pos="11" type="boolean"/> 72 <bitfield name="PIPE3" low="12" high="14" type="mdp_mixer_stage_id"/> 73 <bitfield name="PIPE3_MIXER1" pos="15" type="boolean"/> 74 <bitfield name="PIPE4" low="16" high="18" type="mdp_mixer_stage_id"/> 75 <bitfield name="PIPE4_MIXER1" pos="19" type="boolean"/> [all …]
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| H A D | edp.xml | 23 <bitfield name="ENABLE" pos="0" type="boolean"/> 24 <bitfield name="RESET" pos="1" type="boolean"/> 28 <bitfield name="TRAIN_PATTERN_1" pos="0" type="boolean"/> 29 <bitfield name="TRAIN_PATTERN_2" pos="1" type="boolean"/> 30 <bitfield name="TRAIN_PATTERN_3" pos="2" type="boolean"/> 31 <bitfield name="SYMBOL_ERR_RATE_MEAS" pos="3" type="boolean"/> 32 <bitfield name="PRBS7" pos="4" type="boolean"/> 33 <bitfield name="CUSTOM_80_BIT_PATTERN" pos="5" type="boolean"/> 34 <bitfield name="SEND_VIDEO" pos="6" type="boolean"/> 35 <bitfield name="PUSH_IDLE" pos="7" type="boolean"/> [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dwb.h | 202 #define DWBC_REG_FIELD_LIST_DCN2_0(type) \ argument 203 type WB_ENABLE;\ 204 type DISPCLK_R_WB_GATE_DIS;\ 205 type DISPCLK_G_WB_GATE_DIS;\ 206 type DISPCLK_G_WBSCL_GATE_DIS;\ 207 type WB_TEST_CLK_SEL;\ 208 type WB_LB_LS_DIS;\ 209 type WB_LB_SD_DIS;\ 210 type WB_LUT_LS_DIS;\ 211 type WBSCL_LB_MEM_PWR_MODE_SEL;\ [all …]
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| /linux/drivers/net/ethernet/microchip/vcap/ |
| H A D | vcap_model_kunit.c | 19 .type = VCAP_FIELD_U32, 24 .type = VCAP_FIELD_BIT, 29 .type = VCAP_FIELD_U32, 34 .type = VCAP_FIELD_U32, 39 .type = VCAP_FIELD_U32, 44 .type = VCAP_FIELD_U32, 49 .type = VCAP_FIELD_BIT, 54 .type = VCAP_FIELD_U32, 59 .type = VCAP_FIELD_U32, 64 .type = VCAP_FIELD_U32, [all …]
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| /linux/tools/testing/selftests/drivers/net/netdevsim/ |
| H A D | hw_stats_l3.sh | 85 local type=$1; shift 89 echo $ifindex > $(DEBUGFS_DIR $instance)/hwstats/$type/$action 127 $IP link add name dummy1 type dummy 147 local type=$1; shift 156 local type=$1; shift 158 [[ $(netdev_hwstats_used $netdev $type) == "true" ]] 164 local type=$1; shift 166 [[ $(netdev_hwstats_used $netdev $type) == "false" ]] 172 local type=$1; shift 175 jq ".[].info.${type}_stats.request" [all …]
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| /linux/Documentation/netlink/ |
| H A D | netlink-raw.yaml | 10 type: string 13 type: string 16 type: integer 19 type: [ string, integer ] 26 type: object 32 type: string 34 type: string 41 type: integer 45 type: string 49 type: string [all …]
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| H A D | genetlink.yaml | 10 type: string 13 type: integer 16 type: [ string, integer ] 20 # literal int, const name, or limit based on fixed-width type 22 type: [ string, integer ] 29 type: object 37 type: string 43 type: string 46 description: List of type and constant definitions (enums, flags, defines). 47 type: array [all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_vcap_ag_api.c | 19 .type = VCAP_FIELD_BIT, 24 .type = VCAP_FIELD_BIT, 29 .type = VCAP_FIELD_U32, 34 .type = VCAP_FIELD_U32, 39 .type = VCAP_FIELD_U32, 44 .type = VCAP_FIELD_U72, 49 .type = VCAP_FIELD_BIT, 54 .type = VCAP_FIELD_BIT, 59 .type = VCAP_FIELD_U32, 64 .type = VCAP_FIELD_U32, [all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_vcap_ag_api.c | 18 .type = VCAP_FIELD_BIT, 23 .type = VCAP_FIELD_BIT, 28 .type = VCAP_FIELD_U32, 33 .type = VCAP_FIELD_U32, 38 .type = VCAP_FIELD_U32, 43 .type = VCAP_FIELD_U72, 48 .type = VCAP_FIELD_BIT, 53 .type = VCAP_FIELD_BIT, 58 .type = VCAP_FIELD_U32, 63 .type = VCAP_FIELD_U32, [all …]
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| /linux/arch/riscv/include/asm/ |
| H A D | gdb_xml.h | 26 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>" 27 "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>" 28 "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>" 29 "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>" 30 "<reg name=\""DBG_REG_TP"\" bitsize=\"64\" type=\"data_ptr\"/>" 31 "<reg name=\""DBG_REG_T0"\" bitsize=\"64\" type=\"int\"/>" 32 "<reg name=\""DBG_REG_T1"\" bitsize=\"64\" type=\"int\"/>" 33 "<reg name=\""DBG_REG_T2"\" bitsize=\"64\" type=\"int\"/>" 34 "<reg name=\""DBG_REG_FP"\" bitsize=\"64\" type=\"data_ptr\"/>" 35 "<reg name=\""DBG_REG_S1"\" bitsize=\"64\" type=\"int\"/>" [all …]
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| /linux/Documentation/userspace-api/media/ |
| H A D | conf_nitpick.py | 49 ("c:type", "atomic_t"), 50 ("c:type", "bool"), 51 ("c:type", "boolean"), 52 ("c:type", "buf_queue"), 53 ("c:type", "device"), 54 ("c:type", "device_driver"), 55 ("c:type", "device_node"), 56 ("c:type", "enum"), 57 ("c:type", "fd"), 58 ("c:type", "fd_set"), [all …]
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| /linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_vcap_ag_api.c | 11 .type = VCAP_FIELD_BIT, 16 .type = VCAP_FIELD_U32, 21 .type = VCAP_FIELD_U32, 26 .type = VCAP_FIELD_BIT, 31 .type = VCAP_FIELD_BIT, 36 .type = VCAP_FIELD_BIT, 41 .type = VCAP_FIELD_BIT, 46 .type = VCAP_FIELD_BIT, 51 .type = VCAP_FIELD_BIT, 56 .type = VCAP_FIELD_BIT, [all …]
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| /linux/Documentation/netlink/specs/ |
| H A D | conntrack.yaml | 13 type: struct 17 type: u8 20 type: u8 24 type: u16 27 type: struct 31 type: u8 36 type: u8 41 type: flags 53 type: enum 72 type: enum [all …]
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| /linux/net/ieee802154/ |
| H A D | nl_policy.c | 15 [IEEE802154_ATTR_DEV_NAME] = { .type = NLA_STRING, }, 16 [IEEE802154_ATTR_DEV_INDEX] = { .type = NLA_U32, }, 17 [IEEE802154_ATTR_PHY_NAME] = { .type = NLA_STRING, }, 19 [IEEE802154_ATTR_STATUS] = { .type = NLA_U8, }, 20 [IEEE802154_ATTR_SHORT_ADDR] = { .type = NLA_U16, }, 21 [IEEE802154_ATTR_HW_ADDR] = { .type = NLA_HW_ADDR, }, 22 [IEEE802154_ATTR_PAN_ID] = { .type = NLA_U16, }, 23 [IEEE802154_ATTR_CHANNEL] = { .type = NLA_U8, }, 24 [IEEE802154_ATTR_BCN_ORD] = { .type = NLA_U8, }, 25 [IEEE802154_ATTR_SF_ORD] = { .type = NLA_U8, }, [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
| H A D | dcn30_mpc.h | 645 #define MPC_REG_FIELD_LIST_DCN3_0(type) \ argument 646 MPC_REG_FIELD_LIST_DCN2_0(type) \ 647 type MPC_DWB0_MUX;\ 648 type MPC_DWB0_MUX_STATUS;\ 649 type MPC_OUT_RATE_CONTROL;\ 650 type MPC_OUT_RATE_CONTROL_DISABLE;\ 651 type MPC_OUT_FLOW_CONTROL_MODE;\ 652 type MPC_OUT_FLOW_CONTROL_COUNT; \ 653 type MPCC_GAMUT_REMAP_MODE; \ 654 type MPCC_GAMUT_REMAP_MODE_CURRENT;\ [all …]
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| /linux/net/devlink/ |
| H A D | netlink_gen.c | 42 [DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR] = { .type = NLA_BINARY, }, 50 [DEVLINK_RATE_TC_ATTR_BW] = { .type = NLA_U32, }, 54 [DEVLINK_ATTR_SELFTEST_ID_FLASH] = { .type = NLA_FLAG, }, 59 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, }, 60 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, }, 65 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, }, 66 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, }, 67 [DEVLINK_ATTR_PORT_INDEX] = { .type = NLA_U32, }, 72 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, }, 73 [DEVLINK_ATTR_DEV_NAME] = { .type [all...] |
| /linux/drivers/gpu/drm/msm/registers/adreno/ |
| H A D | a6xx.xml | 30 <bitfield name="RBBM_GPU_IDLE" pos="0" type="boolean"/> 31 <bitfield name="CP_AHB_ERROR" pos="1" type="boolean"/> 32 <bitfield name="CP_IPC_INTR_0" pos="4" type="boolean" variants="A7XX-"/> 33 <bitfield name="CP_IPC_INTR_1" pos="5" type="boolean" variants="A7XX-"/> 34 <bitfield name="RBBM_ATB_ASYNCFIFO_OVERFLOW" pos="6" type="boolean"/> 35 <bitfield name="RBBM_GPC_ERROR" pos="7" type="boolean"/> 36 <bitfield name="CP_SW" pos="8" type="boolean"/> 37 <bitfield name="CP_HW_ERROR" pos="9" type="boolean"/> 38 <bitfield name="CP_CCU_FLUSH_DEPTH_TS" pos="10" type="boolean"/> 39 <bitfield name="CP_CCU_FLUSH_COLOR_TS" pos="11" type="boolean"/> [all …]
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| /linux/arch/powerpc/lib/ |
| H A D | feature-fixups-test.S | 227 #define MAKE_MACRO_TEST(TYPE) \ argument 228 globl(ftr_fixup_test_ ##TYPE##_macros) \ 231 BEGIN_##TYPE##_SECTION \ 235 END_##TYPE##_SECTION(0, 1) \ 239 BEGIN_##TYPE##_SECTION \ 243 END_##TYPE##_SECTION(0, 0) \ 247 BEGIN_##TYPE##_SECTION \ 250 BEGIN_##TYPE##_SECTION_NESTED(80) \ 253 END_##TYPE##_SECTION_NESTED(0, 1, 80) \ 256 END_##TYPE##_SECTION(0, 0) \ [all …]
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| /linux/scripts/ |
| H A D | extract_xc3028.pl | 163 # Firmware 0, type: BASE FW F8MHZ (0x00000003), id: (0000000000000000), size: 6635 166 write_le32(0x00000003); # Type 172 # Firmware 1, type: BASE FW F8MHZ MTS (0x00000007), id: (0000000000000000), size: 6635 175 write_le32(0x00000007); # Type 181 # Firmware 2, type: BASE FW FM (0x00000401), id: (0000000000000000), size: 6525 184 write_le32(0x00000401); # Type 190 # Firmware 3, type: BASE FW FM INPUT1 (0x00000c01), id: (0000000000000000), size: 6539 193 write_le32(0x00000c01); # Type 199 # Firmware 4, type: BASE FW (0x00000001), id: (0000000000000000), size: 6633 202 write_le32(0x00000001); # Type [all …]
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