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Searched +full:tightly +full:- +full:coupled (Results 1 – 21 of 21) sorted by relevance

/freebsd/usr.sbin/nfsd/
H A Dpnfs.488 server only provides File Layout support for non-mirrored
101 .Dq tightly coupled
113 For a non-mirrored configuration, the
142 .Bd -literal -offset indent
143 pnfsd.dsfile - This extended attribute stores the information that the
145 pnfsd.dsattr - This extended attribute stores the Size, AccessTime,
158 .Dq tightly coupled
166 For non-pNFS aware NFS clients, the pNFS service appears just like a normal
168 For the non-pNFS aware client, the MDS will perform I/O operations on the
170 a proxy for the non-pNFS aware client.
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,nvic.txt3 The NVIC provides an interrupt controller that is tightly coupled to
4 Cortex-M based processor cores. The NVIC implemented on different SoCs
9 - compatible : should be one of:
10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
21 - reg : Specifies base physical address(s) and size of the NVIC registers.
24 - arm,num-irq-priority-bits: The number of priority bits implemented by the
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 bootph-all;
11 compatible = "pinctrl-single";
13 #pinctrl-cells = <1>;
14 pinctrl-single,register-width = <32>;
15 pinctrl-single,function-mask = <0xffffffff>;
19 bootph-pre-ram;
20 compatible = "ti,j721e-esm";
23 ti,esm-pins = <0>, <1>, <2>, <85>;
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H A Dk3-am62a-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
19 compatible = "ti,j721e-esm";
21 bootph-pre-ram;
23 ti,esm-pins = <0>, <1>, <2>, <85>;
32 compatible = "ti,am654-timer";
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H A Dk3-am62p-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
9 compatible = "pinctrl-single";
11 #pinctrl-cells = <1>;
12 pinctrl-single,register-width = <32>;
13 pinctrl-single,function-mask = <0xffffffff>;
14 bootph-all;
18 compatible = "ti,j721e-esm";
20 ti,esm-pins = <0>, <1>, <2>, <85>;
22 bootph-pre-ram;
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H A Dk3-am62p-j722s-common-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
15 pinctrl-single,gpio-range =
19 bootph-all;
21 mcu_pmx_range: gpio-range {
22 #pinctrl-single,gpio-range-cells = <3>;
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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dcommon.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
21 have to be tightly coupled with the LED device binding. They are represented
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
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H A Dti,k3-r5f-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5
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/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb_pcireg.h1 /*-
36 * - PCI (cid=0x804, revision <= 12)
47 * - PCI (cid=0x804, revision >= 13)
48 * - PCIE (cid=0x820) with ChipCommon (revision <= 31)
59 * - PCIE (cid=0x820) with ChipCommon (revision >= 32)
70 * - PCIE Gen 2 (cid=0x83c)
82 * [0x0000+0x????] fixed ARM tightly-coupled memory (TCM).
89 * - Mapped GPIO CSRs into the PCI config space. Refer to
93 * - Mapped the clock CSR into the PCI config space. Refer to
106 /* PCI (non-PCIe) GPIO/Clock Config Registers */
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/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DInlineAdvisor.h1 //===- InlineAdvisor.h - Inlining decision making abstraction -*- C++ ---*-===//
5 // SPDX-License-Identifie
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/freebsd/contrib/googletest/docs/
H A Dgmock_faq.md6 [high-perf dependency injection technique](gmock_cook_book.md#MockingNonVirtualMethods).
72 Note that we are talking about the *top-level* `const` modifier here. If the
84 You might want to run your test with `--gmock_verbose=info`. This flag lets
164 // - value_ is leaked.
194 over-specify your tests, and we want to make it harder to do so.
232 fixture's set-up phase) and customize it with more specific rules later. If
243 `ON_CALL` in the set-up part of a test doesn't mean that the calls are expected.
268 Also, you can control the verbosity by specifying `--gmock_verbose=error`. Other
275 argument, you can use testing::DeleteArg<N>() to delete the N'th (zero-indexed)
310 that your modules are too tightly coupled (and less flexible, less reusable,
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DIdentifierTable.h1 //===- IdentifierTable.h - Hash table for identifier lookup -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
64 /// scope. Such identifiers might be implementation-specific global functions
71 /// identifiers might be implementation-specific keywords or macros, for
90 /// - ObjCKeywordKind enumerators
91 /// - NotableIdentifierKind enumerators
92 /// - Builtin::ID enumerators
93 /// - NotInterestingIdentifier
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/freebsd/contrib/llvm-project/llvm/include/llvm/Passes/
H A DCodeGenPassBuilder.h1 //===- Construction of codegen pass pipelines ------------------*- C++ -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
117 /// all of the built-in passes, and those may reference these members during
128 // Target should override TM.Options.EnableIPRA in their target-specific in CodeGenPassBuilder()
166 // TODO: add a Function -> MachineFunction adaptor and merge
278 /// addInstSelector - This method should install an instruction selector pass,
288 /// Add passes that optimize instruction level parallelism for out-of-order
300 /// addPreRewrite - Add passes to the optimized register allocation pipeline
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetPassConfig.cpp1 //===- TargetPassConfig.cpp - Target independent code generation passes ---===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===---------------------------------------------------------------------===//
58 EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
61 static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden,
63 static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
65 static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
67 static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
68 cl::desc("Disable pre-register allocation tail duplication"));
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/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/
H A DELFEmitter.cpp1 //===- yaml2elf - Convert YAML to a ELF object file -----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
85 uint64_t PaddingSize = AlignedOffset - CurrentOffset; in padToAlignment()
139 memcpy(&Buf[Pos - InitialOffset], Data, Size); in updateDataAt()
158 Idx = I->getValue(); in lookup()
362 if (Sections.empty() || Sections.front()->Type != ELF::SHT_NULL) in ELFState()
384 if (C->Name.empty()) { in ELFState()
387 C->Name = StringRef(NewName).copy(StringAlloc); in ELFState()
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/freebsd/sys/fs/nfsserver/
H A Dnfs_nfsdstate.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
111 "For pNFS service, do Getattr ops to keep atime up-to-date");
296 * If returning a non-error, the clp structure must either be linked into
328 ((nd->nd_flag & ND_GSS) != 0 && nfsrv_nogsscallback != 0)) in nfsrv_setclient()
342 new_clp->lc_program = 0; in nfsrv_setclient()
356 if (new_clp->lc_idlen == clp->lc_idlen && in nfsrv_setclient()
357 !NFSBCMP(new_clp->lc_id, clp->lc_id, clp->lc_idlen)) { in nfsrv_setclient()
367 (clp->lc_flags & (LCL_NEEDSCONFIRM | LCL_ADMINREVOKED))) { in nfsrv_setclient()
368 if ((nd->nd_flag & ND_NFSV41) != 0 && confirmp->lval[1] != 0) { in nfsrv_setclient()
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/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DInstructions.cpp1 //===- Instructions.cpp - Implement the LLVM instructions -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements all of the non-inline methods for the LLVM instruction
12 //===----------------------------------------------------------------------===//
54 "disable-i2p-p2i-opt", cl::init(false),
57 //===----------------------------------------------------------------------===//
59 //===----------------------------------------------------------------------===//
70 checkedMulUnsigned(Size.getKnownMinValue(), C->getZExtValue()); in getAllocationSize()
83 auto CheckedProd = checkedMulUnsigned(Size->getKnownMinValue(), in getAllocationSizeInBits()
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/freebsd/crypto/openssh/
H A DChangeLog17 upstream: openssh-9.7
19 OpenBSD-Commit-ID: 618ececf58b8cdae016b149787af06240f7b0cbc
46 OpenBSD-Commit-ID: e58f18042b86425405ca09e6e9d7dfa1df9f5f7f
52 upstream: skip more whitespace, fixes find-principals on
56 OpenBSD-Commit-ID: b3a22a2afd753d70766f34bc7f309c03706b5298
67 OpenBSD-Regress-ID: f68d79e7f00caa8d216ebe00ee5f0adbb944062a
73 Prefer openssl binary from --with-ssl-dir directory.
75 Use openssl in the directory specified by --with-ssl-dir as long
86 OpenBSD-Commit-ID: 97d96a166b1ad4b8d229864a553e3e56d3116860
92 upstream: wrap a few PKCS#11-specific bits in ENABLE_PKCS11
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/freebsd/contrib/ncurses/form/
H A Dfrm_driver.c2 * Copyright 2018-2020,2021 Thomas E. Dickey *
3 * Copyright 1998-2016,2017 Free Software Foundation, Inc. *
38 /*----------------------------------------------------------------------------
53 b) Inter-Field Navigation ( all functions prefixed by FN_ )
56 c) Intra-Field Navigation ( all functions prefixed by IFN_ )
59 Essentially this is a specialization of Intra-Field navigation.
60 It has to check for a multi-line field.
62 Essentially this is a specialization of Intra-Field navigation.
63 It has to check for a single-line field.
68 h) Field-Validation requests ( all functions prefixed by FV_ )
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/freebsd/share/dict/
H A Dweb244568 coupled
99810 Jean-Christophe
99811 Jean-Pierre
203394 tightly