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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi2 #include <dt-bindings/clock/tegra30-car.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
10 #include "tegra30-peripherals-opp.dtsi"
13 compatible = "nvidia,tegra30";
24 compatible = "nvidia,tegra30-pcie";
119 compatible = "nvidia,tegra30-host1x";
138 compatible = "nvidia,tegra30-mpe";
153 compatible = "nvidia,tegra30-vi";
168 compatible = "nvidia,tegra30-epp";
183 compatible = "nvidia,tegra30-isp";
[all …]
H A Dtegra30-cardhu-a02.dts4 #include "tegra30-cardhu.dtsi"
9 model = "NVIDIA Tegra30 Cardhu A02 evaluation board";
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
H A Dtegra30-cardhu-a04.dts4 #include "tegra30-cardhu.dtsi"
9 model = "NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation board";
10 compatible = "nvidia,cardhu-a04", "nvidia,cardhu", "nvidia,tegra30";
H A Dtegra30-asus-nexus7-grouper-PM269.dts4 #include "tegra30-asus-nexus7-grouper-ti-pmic.dtsi"
5 #include "tegra30-asus-nexus7-grouper.dtsi"
H A Dtegra30-asus-nexus7-grouper-E1565.dts4 #include "tegra30-asus-nexus7-grouper-maxim-pmic.dtsi"
5 #include "tegra30-asus-nexus7-grouper.dtsi"
/linux/Documentation/devicetree/bindings/arm/
H A Dtegra.yaml52 - const: nvidia,tegra30
58 - const: nvidia,tegra30
62 - const: nvidia,tegra30
71 - const: nvidia,tegra30
75 - const: nvidia,tegra30
79 - const: nvidia,tegra30
83 - const: nvidia,tegra30
87 - const: nvidia,tegra30
93 - const: nvidia,tegra30
98 - const: nvidia,tegra30
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/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra30-i2s.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-i2s.yaml#
7 title: NVIDIA Tegra30 I2S controller
18 - nvidia,tegra30-i2s
21 - const: nvidia,tegra30-i2s
57 #include <dt-bindings/clock/tegra30-car.h>
60 compatible = "nvidia,tegra30-i2s";
H A Dnvidia,tegra30-ahub.txt1 NVIDIA Tegra30 AHUB (Audio Hub)
4 - compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
10 - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
21 Tegra30 and later:
53 Tegra30: 3
67 compatible = "nvidia,tegra30-ahub";
H A Dnvidia,tegra30-hda.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml#
24 - nvidia,tegra30-hda
34 - const: nvidia,tegra30-hda
38 - const: nvidia,tegra30-hda
98 - nvidia,tegra30-hda
184 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
/linux/Documentation/devicetree/bindings/devfreq/
H A Dnvidia,tegra30-actmon.yaml4 $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
7 title: NVIDIA Tegra30 Activity Monitor
23 - nvidia,tegra30-actmon
86 #include <dt-bindings/memory/tegra30-mc.h>
89 compatible = "nvidia,tegra30-mc";
102 compatible = "nvidia,tegra30-emc";
115 compatible = "nvidia,tegra30-actmon";
/linux/arch/arm/mach-tegra/
H A DMakefile10 obj-y += sleep-tegra30.o
12 obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o
16 obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o
17 obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o
H A Dsleep-tegra30.S201 cmp r10, #TEGRA30
202 bne _no_cpu0_chk @ It's not Tegra30
221 cmp r10, #TEGRA30
246 cmp r10, #TEGRA30
252 cmp r10, #TEGRA30
380 cmp r10, #TEGRA30
421 * enabled by the Tegra30 CLK driver on an as-needed basis, see
425 cmp r1, #TEGRA30
462 cmp r10, #TEGRA30
509 cmp r10, #TEGRA30
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H A Dpm.c55 case TEGRA30: in tegra_tear_down_cpu_init()
149 * firmware. Note that CPUIDLE won't ever enter powergate on Tegra30 in tegra_sleep_cpu()
183 case TEGRA30: in tegra_pm_set()
210 * which is the case for Tegra30 that has to re-enable the cache in tegra_pm_enter_lp2()
271 case TEGRA30: in tegra_lp1_iram_hook()
301 case TEGRA30: in tegra_sleep_core_init()
376 * which is the case for Tegra30 that has to re-enable the cache in tegra_suspend_enter()
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-mc.yaml#
7 title: NVIDIA Tegra30 SoC Memory Controller
15 Tegra30 Memory Controller architecturally consists of the following parts:
33 The Tegra30 Memory Controller handles memory requests from internal clients
39 const: nvidia,tegra30-mc
133 compatible = "nvidia,tegra30-mc";
/linux/Documentation/devicetree/bindings/timer/
H A Dnvidia,tegra-timer.yaml36 - const: nvidia,tegra30-timer
38 - const: nvidia,tegra30-timer
78 - const: nvidia,tegra30-timer
80 - const: nvidia,tegra30-timer
83 The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
116 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
/linux/Documentation/devicetree/bindings/clock/
H A Dnvidia,tegra20-car.yaml32 - nvidia,tegra30-car
52 - nvidia,tegra30-sclk
53 - nvidia,tegra30-pllc
54 - nvidia,tegra30-plle
55 - nvidia,tegra30-pllm
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra20-i2c.yaml28 Tegra30 has 5 generic I2C controller. This controller is very much
32 with "nvidia,tegra30-i2c" to enable the continue transfer support.
36 - const: nvidia,tegra30-i2c
40 similar to Tegra30 I2C controller with some hardware modification:
41 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk
44 - Tegra30/Tegra20 I2C controller has enabled per packet transfer
148 - nvidia,tegra30-i2c
/linux/Documentation/devicetree/bindings/thermal/
H A Dnvidia,tegra30-tsensor.yaml4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml#
7 title: NVIDIA Tegra30 Thermal Sensor
34 const: nvidia,tegra30-tsensor
63 compatible = "nvidia,tegra30-tsensor";
/linux/Documentation/devicetree/bindings/serial/
H A Dnvidia,tegra20-hsuart.yaml7 title: NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver
18 - nvidia,tegra30-hsuart
23 - const: nvidia,tegra30-hsuart
111 #include <dt-bindings/clock/tegra30-car.h>
115 compatible = "nvidia,tegra30-hsuart";
/linux/drivers/soc/tegra/
H A Dflowctrl.c87 case TEGRA30: in flowctrl_cpu_suspend_enter()
95 if (tegra_get_chip_id() == TEGRA30) { in flowctrl_cpu_suspend_enter()
97 * The wfi doesn't work well on Tegra30 because in flowctrl_cpu_suspend_enter()
101 * Note that Tegra30 TRM doc clearly stands that in flowctrl_cpu_suspend_enter()
141 case TEGRA30: in flowctrl_cpu_suspend_exit()
173 { .compatible = "nvidia,tegra30-flowctrl" },
/linux/Documentation/devicetree/bindings/gpio/
H A Dnvidia,tegra20-gpio.yaml18 - nvidia,tegra30-gpio
25 - const: nvidia,tegra30-gpio
32 there should be 7 interrupts specified, and for Tegra30, there should
66 const: nvidia,tegra30-gpio
/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt5 Thus on Tegra20 there are 3 coupled regulators and on NVIDIA Tegra30
15 Tegra30 voltage coupling
18 On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE
/linux/drivers/clk/tegra/
H A Dclk-device.c183 { .compatible = "nvidia,tegra30-sclk" },
184 { .compatible = "nvidia,tegra30-pllc" },
185 { .compatible = "nvidia,tegra30-plle" },
186 { .compatible = "nvidia,tegra30-pllm" },
H A Dclk-tegra30.c18 #include <dt-bindings/clock/tegra30-car.h>
606 { .con_id = "apbif", .dev_id = "tegra30-ahub", .dt_id = TEGRA30_CLK_APBIF },
607 { .con_id = "hda2hdmi", .dev_id = "tegra30-hda", .dt_id = TEGRA30_CLK_HDA2HDMI },
618 { .dev_id = "tegra30-i2s.0", .dt_id = TEGRA30_CLK_I2S0 },
619 { .dev_id = "tegra30-i2s.1", .dt_id = TEGRA30_CLK_I2S1 },
620 { .dev_id = "tegra30-i2s.2", .dt_id = TEGRA30_CLK_I2S2 },
621 { .dev_id = "tegra30-i2s.3", .dt_id = TEGRA30_CLK_I2S3 },
622 { .dev_id = "tegra30-i2s.4", .dt_id = TEGRA30_CLK_I2S4 },
623 { .con_id = "spdif_out", .dev_id = "tegra30-spdif", .dt_id = TEGRA30_CLK_SPDIF_OUT },
624 { .con_id = "spdif_in", .dev_id = "tegra30-spdif", .dt_id = TEGRA30_CLK_SPDIF_IN },
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra30-pinmux.yaml4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra30-pinmux.yaml#
7 title: NVIDIA Tegra30 pinmux Controller
15 const: nvidia,tegra30-pinmux
146 compatible = "nvidia,tegra30-pinmux";

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