| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | nvidia,tegra194-ccplex.yaml | 4 $id: http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml# 7 title: NVIDIA Tegra194 CPU Complex 15 Tegra194 SOC has homogeneous architecture where each cluster has two 25 - nvidia,tegra194-ccplex 38 compatible = "nvidia,tegra194-ccplex"; 44 compatible = "nvidia,tegra194-carmel"; 51 compatible = "nvidia,tegra194-carmel"; 58 compatible = "nvidia,tegra194-carmel"; 65 compatible = "nvidia,tegra194-carmel";
|
| /linux/Documentation/devicetree/bindings/arm/tegra/ |
| H A D | nvidia,tegra194-cbb.yaml | 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml# 7 title: NVIDIA Tegra194 CBB 1.0 48 - nvidia,tegra194-cbb-noc 49 - nvidia,tegra194-aon-noc 50 - nvidia,tegra194-bpmp-noc 51 - nvidia,tegra194-rce-noc 52 - nvidia,tegra194-sce-noc 91 compatible = "nvidia,tegra194-cbb-noc";
|
| H A D | nvidia,tegra194-axi2apb.yaml | 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml# 7 title: NVIDIA Tegra194 AXI2APB bridge 18 - nvidia,tegra194-axi2apb 33 compatible = "nvidia,tegra194-axi2apb";
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | nvidia,tegra194-xusb.yaml | 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml# 7 title: NVIDIA Tegra194 xHCI controller 18 const: nvidia,tegra194-xusb 133 #include <dt-bindings/clock/tegra194-clock.h> 135 #include <dt-bindings/memory/tegra194-mc.h> 136 #include <dt-bindings/power/tegra194-powergate.h> 137 #include <dt-bindings/reset/tegra194-reset.h> 140 compatible = "nvidia,tegra194-xusb";
|
| H A D | nvidia,tegra-xudc.yaml | 24 - nvidia,tegra194-xudc # For Tegra194 153 - nvidia,tegra194-xudc 171 - nvidia,tegra194-xudc
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | phy-tegra194-p2u.yaml | 4 $id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml# 7 title: NVIDIA Tegra194 & Tegra234 P2U 13 Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High 24 - nvidia,tegra194-p2u 48 compatible = "nvidia,tegra194-p2u";
|
| /linux/Documentation/devicetree/bindings/display/tegra/ |
| H A D | nvidia,tegra186-display.yaml | 20 - nvidia,tegra194-display 208 #include <dt-bindings/clock/tegra194-clock.h> 210 #include <dt-bindings/memory/tegra194-mc.h> 211 #include <dt-bindings/power/tegra194-powergate.h> 212 #include <dt-bindings/reset/tegra194-reset.h> 215 compatible = "nvidia,tegra194-display"; 238 compatible = "nvidia,tegra194-dc"; 256 compatible = "nvidia,tegra194-dc"; 274 compatible = "nvidia,tegra194-dc"; 292 compatible = "nvidia,tegra194-dc";
|
| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | nvidia,tegra194-tcu.yaml | 4 $id: http://devicetree.org/schemas/serial/nvidia,tegra194-tcu.yaml# 26 - const: nvidia,tegra194-tcu 30 - const: nvidia,tegra194-tcu 57 compatible = "nvidia,tegra194-tcu";
|
| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | nvidia,tegra194-pinmux.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml# 7 title: NVIDIA Tegra194 Pinmux Controller 16 - nvidia,tegra194-pinmux 17 - nvidia,tegra194-pinmux-aon 62 const: nvidia,tegra194-pinmux 216 const: nvidia,tegra194-pinmux-aon 265 compatible = "nvidia,tegra194-pinmux";
|
| /linux/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra194-p3509-0000+p3668-0001.dts | 4 #include "tegra194-p3668-0001.dtsi" 5 #include "tegra194-p3509-0000.dtsi" 9 compatible = "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194";
|
| H A D | tegra194-p3509-0000+p3668-0000.dts | 4 #include "tegra194-p3668-0000.dtsi" 5 #include "tegra194-p3509-0000.dtsi" 9 compatible = "nvidia,p3509-0000+p3668-0000", "nvidia,tegra194";
|
| H A D | tegra194-p3668-0001.dtsi | 2 #include "tegra194-p3668.dtsi" 6 compatible = "nvidia,p3668-0001", "nvidia,tegra194";
|
| H A D | tegra194-p3668-0000.dtsi | 2 #include "tegra194-p3668.dtsi" 6 compatible = "nvidia,p3668-0000", "nvidia,tegra194";
|
| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | nvidia,tegra20-i2c.yaml | 77 Tegra194 has 8 generic I2C controllers, two of which are in the AON 82 const: nvidia,tegra194-i2c 91 Tegra194, a SW mutex register is added to support use of the same I2C 112 Module reset. This property is optional for controllers in Tegra194, 199 - nvidia,tegra194-i2c
|
| /linux/drivers/soc/tegra/fuse/ |
| H A D | tegra-apbmisc.c | 65 case TEGRA194: in tegra_is_silicon() 76 * Chips prior to Tegra194 have a different way of determining whether in tegra_is_silicon() 114 if (!of_machine_is_compatible("nvidia,tegra194")) { in tegra194_miscreg_mask_serror() 115 WARN(1, "Only supported for Tegra194 devices!\n"); in tegra194_miscreg_mask_serror() 129 { .compatible = "nvidia,tegra194-misc", },
|
| /linux/drivers/hte/ |
| H A D | Makefile | 2 obj-$(CONFIG_HTE_TEGRA194) += hte-tegra194.o 3 obj-$(CONFIG_HTE_TEGRA194_TEST) += hte-tegra194-test.o
|
| /linux/drivers/acpi/ |
| H A D | pci_mcfg.c | 121 { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops}, 122 { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops}, 123 { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops}, 124 { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops}, 125 { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops}, 126 { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops},
|
| /linux/drivers/phy/tegra/ |
| H A D | phy-tegra194-p2u.c | 156 .compatible = "nvidia,tegra194-p2u", 170 .name = "tegra194-p2u", 177 MODULE_DESCRIPTION("NVIDIA Tegra194 PIPE2UPHY PHY driver");
|
| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | nvidia,tegra20-pwm.yaml | 31 - const: nvidia,tegra194-pwm 36 - const: nvidia,tegra194-pwm
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | nvidia,tegra210-amx.yaml | 31 - nvidia,tegra194-amx 38 - const: nvidia,tegra194-amx
|
| H A D | nvidia,tegra30-hda.yaml | 25 - nvidia,tegra194-hda 120 - nvidia,tegra194-hda
|
| /linux/drivers/iommu/arm/arm-smmu/ |
| H A D | arm-smmu-nvidia.c | 15 * Tegra194 has three ARM MMU-500 Instances. 267 * Tegra194 and Tegra234 SoCs have the erratum that causes walk cache in nvidia_smmu_init_context() 275 * Fix this by limiting the page mappings to PAGE_SIZE on Tegra194 and in nvidia_smmu_init_context() 279 of_device_is_compatible(np, "nvidia,tegra194-smmu")) { in nvidia_smmu_init_context()
|
| /linux/Documentation/driver-api/hte/ |
| H A D | tegra-hte.rst | 45 ``drivers/hte/hte-tegra194.c``. The test driver 46 ``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ
|
| /linux/Documentation/devicetree/bindings/gpu/host1x/ |
| H A D | nvidia,tegra210-nvenc.yaml | 26 - nvidia,tegra194-nvenc 99 - nvidia,tegra194-nvenc
|
| /linux/sound/hda/controllers/ |
| H A D | tegra.c | 67 * Tegra194 does not reflect correct number of SDO lines. Below macro 296 * Tegra194 has 4 SDO lines and the STRIPE can be used to in hda_tegra_first_init() 304 if (of_device_is_compatible(np, "nvidia,tegra194-hda")) { in hda_tegra_first_init() 503 { .compatible = "nvidia,tegra194-hda", .data = &tegra194_data }, 545 * "hda2codec_2x" reset is not present on Tegra194. Though DT would in hda_tegra_probe()
|