1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Brcmstb PCIe Host Controller 8 9maintainers: 10 - Jim Quinlan <james.quinlan@broadcom.com> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - brcm,bcm2711-pcie # The Raspberry Pi 4 17 - brcm,bcm2712-pcie # Raspberry Pi 5 18 - brcm,bcm4908-pcie 19 - brcm,bcm7211-pcie # Broadcom STB version of RPi4 20 - brcm,bcm7216-pcie # Broadcom 7216 Arm 21 - brcm,bcm7278-pcie # Broadcom 7278 Arm 22 - brcm,bcm7425-pcie # Broadcom 7425 MIPs 23 - brcm,bcm7435-pcie # Broadcom 7435 MIPs 24 - brcm,bcm7445-pcie # Broadcom 7445 Arm 25 - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 minItems: 1 32 items: 33 - description: PCIe host controller 34 - description: builtin MSI controller 35 36 interrupt-names: 37 minItems: 1 38 items: 39 - const: pcie 40 - const: msi 41 42 ranges: 43 minItems: 1 44 maxItems: 4 45 46 dma-ranges: 47 minItems: 1 48 maxItems: 6 49 50 clocks: 51 maxItems: 1 52 53 clock-names: 54 items: 55 - const: sw_pcie 56 57 msi-controller: 58 description: Identifies the node as an MSI controller. 59 60 msi-parent: 61 description: MSI controller the device is capable of using. 62 63 brcm,enable-ssc: 64 description: Indicates usage of spread-spectrum clocking. 65 type: boolean 66 67 aspm-no-l0s: true 68 69 brcm,clkreq-mode: 70 description: A string that determines the operating 71 clkreq mode of the PCIe RC HW with respect to controlling the refclk 72 signal. There are three different modes -- "safe", which drives the 73 refclk signal unconditionally and will work for all devices but does 74 not provide any power savings; "no-l1ss" -- which provides Clock 75 Power Management, L0s, and L1, but cannot provide L1 substate (L1SS) 76 power savings. If the downstream device connected to the RC is L1SS 77 capable AND the OS enables L1SS, all PCIe traffic may abruptly halt, 78 potentially hanging the system; "default" -- which provides L0s, L1, 79 and L1SS, but not compliant to provide Clock Power Management; 80 specifically, may not be able to meet the T_CLRon max timing of 400ns 81 as specified in "Dynamic Clock Control", section 3.2.5.2.2 PCI 82 Express Mini CEM 2.1 specification. This situation is atypical and 83 should happen only with older devices. 84 $ref: /schemas/types.yaml#/definitions/string 85 enum: [ safe, no-l1ss, default ] 86 87 brcm,scb-sizes: 88 description: u64 giving the 64bit PCIe memory 89 viewport size of a memory controller. There may be up to 90 three controllers, and each size must be a power of two 91 with a size greater or equal to the amount of memory the 92 controller supports. Note that each memory controller 93 may have two component regions -- base and extended -- so 94 this information cannot be deduced from the dma-ranges. 95 $ref: /schemas/types.yaml#/definitions/uint64-array 96 minItems: 1 97 maxItems: 3 98 99 resets: 100 minItems: 1 101 maxItems: 3 102 103 reset-names: 104 minItems: 1 105 items: 106 - enum: [perst, rescal] 107 - const: bridge 108 - const: swinit 109 110required: 111 - compatible 112 - reg 113 - ranges 114 - dma-ranges 115 - "#interrupt-cells" 116 - interrupts 117 - interrupt-names 118 - interrupt-map-mask 119 - interrupt-map 120 - msi-controller 121 122allOf: 123 - $ref: /schemas/pci/pci-host-bridge.yaml# 124 - $ref: /schemas/interrupt-controller/msi-controller.yaml# 125 - if: 126 properties: 127 compatible: 128 contains: 129 const: brcm,bcm4908-pcie 130 then: 131 properties: 132 resets: 133 maxItems: 1 134 135 reset-names: 136 items: 137 - const: perst 138 139 required: 140 - resets 141 - reset-names 142 - if: 143 properties: 144 compatible: 145 contains: 146 const: brcm,bcm7216-pcie 147 then: 148 properties: 149 resets: 150 maxItems: 1 151 152 reset-names: 153 items: 154 - const: rescal 155 156 required: 157 - resets 158 - reset-names 159 160 - if: 161 properties: 162 compatible: 163 contains: 164 const: brcm,bcm7712-pcie 165 then: 166 properties: 167 resets: 168 minItems: 3 169 maxItems: 3 170 171 reset-names: 172 items: 173 - const: rescal 174 - const: bridge 175 - const: swinit 176 177 required: 178 - resets 179 - reset-names 180 181unevaluatedProperties: false 182 183examples: 184 - | 185 #include <dt-bindings/interrupt-controller/irq.h> 186 #include <dt-bindings/interrupt-controller/arm-gic.h> 187 188 scb { 189 #address-cells = <2>; 190 #size-cells = <1>; 191 pcie0: pcie@7d500000 { 192 compatible = "brcm,bcm2711-pcie"; 193 reg = <0x0 0x7d500000 0x9310>; 194 device_type = "pci"; 195 #address-cells = <3>; 196 #size-cells = <2>; 197 #interrupt-cells = <1>; 198 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 199 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 200 interrupt-names = "pcie", "msi"; 201 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 202 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 203 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 204 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 205 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 206 207 msi-parent = <&pcie0>; 208 msi-controller; 209 ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; 210 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, 211 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; 212 brcm,enable-ssc; 213 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; 214 215 /* PCIe bridge, Root Port */ 216 pci@0,0 { 217 #address-cells = <3>; 218 #size-cells = <2>; 219 reg = <0x0 0x0 0x0 0x0 0x0>; 220 compatible = "pciclass,0604"; 221 device_type = "pci"; 222 vpcie3v3-supply = <&vreg7>; 223 ranges; 224 225 /* PCIe endpoint */ 226 pci-ep@0,0 { 227 assigned-addresses = <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>; 228 reg = <0x0 0x0 0x0 0x0 0x0>; 229 compatible = "pci14e4,1688"; 230 }; 231 }; 232 }; 233 }; 234