| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | nvidia,tegra-pinmux-common.yaml | 39 or groups. See the Tegra TRM and various pinmux spreadsheets for complete
54 Tegra TRM to determine which are valid for each pin or group.
87 values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM.
92 values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM.
107 power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM.
169 valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM.
174 valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.
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| /linux/Documentation/translations/zh_CN/video4linux/ |
| H A D | omap3isp.txt | 221 大多数域的解释可以在 OMAP 的 TRM 中找到。以下两个域对于以上所有的
222 私有 IOCTL 配置都很常见，由于他们没有在 TRM 中提及，故需要对其有
257 OMAP 3430 TRM:
261 OMAP 35xx TRM:
264 OMAP 3630 TRM:
268 DM 3730 TRM:
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 40 - nvidia,droop-ctrl: See the register CL_DVFS_DROOP_CTRL in the TRM.
41 - nvidia,force-mode: See the field DFLL_PARAMS_FORCE_MODE in the TRM.
42 - nvidia,cf: Numeric value, see the field DFLL_PARAMS_CF_PARAM in the TRM.
43 - nvidia,ci: Numeric value, see the field DFLL_PARAMS_CI_PARAM in the TRM.
44 - nvidia,cg: Numeric value, see the field DFLL_PARAMS_CG_PARAM in the TRM.
47 - nvidia,cg-scale: Boolean value, see the field DFLL_PARAMS_CG_SCALE in the TRM.
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| /linux/drivers/clk/rockchip/ |
| H A D | rst-rk3588.c | 31 RK3588_CRU_RESET_OFFSET(SRST_CSIPHY0, 1, 7), // missing in TRM
33 RK3588_CRU_RESET_OFFSET(SRST_CSIPHY1, 1, 9), // missing in TRM
51 RK3588_CRU_RESET_OFFSET(SRST_DCPHY0, 3, 11), // missing in TRM
56 RK3588_CRU_RESET_OFFSET(SRST_DCPHY1, 4, 0), // missing in TRM
702 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_ROPLL, 72, 12), // missing in TRM
703 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_LCPLL, 72, 13), // missing in TRM
704 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0, 72, 14), // missing in TRM
705 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_ROPLL, 72, 15), // missing in TRM
708 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_LCPLL, 73, 0), // missing in TRM
709 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1, 73, 1), // missing in TRM
[all …]
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| /linux/Documentation/admin-guide/media/ |
| H A D | omap3isp.rst | 74 OMAP 3430 TRM:
78 OMAP 35xx TRM:
81 OMAP 3630 TRM:
85 DM 3730 TRM:
|
| /linux/Documentation/admin-guide/perf/ |
| H A D | arm-cmn.rst | 25 Most events are specified in a format based directly on the TRM
45 (as defined in the "Node ID Mapping" section of the TRM).
59 "wp_exclusive" are specified per the TRM definitions for dtm_wp_config0.
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| H A D | arm_dsu_pmu.rst | 21 The user should refer to the TRM of the product to figure out the supported events
|
| /linux/drivers/pinctrl/ti/ |
| H A D | pinctrl-ti-iodelay.c | 34 * @signature_mask: CONFIG_REG mask for the signature bits (see TRM)
35 * @signature_value: CONFIG_REG signature value to be written (see TRM)
36 * @lock_mask: CONFIG_REG mask for the lock bits (see TRM)
37 * @lock_val: CONFIG_REG lock value for the lock bits (see TRM)
38 * @unlock_val:CONFIG_REG unlock value for the lock bits (see TRM)
39 * @binary_data_coarse_mask: CONFIG_REG coarse mask (see TRM)
40 * @binary_data_fine_mask: CONFIG_REG fine mask (see TRM)
89 * struct ti_iodelay_reg_values - Computed io_reg configuration values (see TRM)
200 * Update the configuration register as per TRM and lockup once done.
201 * *IMPORTANT NOTE* SoC TRM does recommend doing iodelay programmation only
|
| /linux/arch/arm/mach-omap2/ |
| H A D | omap_hwmod_81xx_data.c | 25 * Common alwon .clkctrl_offs from dm814x TRM "Table 2-278. CM_ALWON REGISTERS"
26 * also dm816x TRM 18.7.17 CM_ALWON device register values minus 0x1400.
95 * TRM 18.7.6 CM_DEFAULT device register values minus 0x500
124 * L4 standard peripherals, see TRM table 1-12 for devices using this.
125 * See TRM table 1-73 for devices using the 125MHz SYSCLK6 clock.
135 * L4 high-speed peripherals. For devices using this, please see the TRM
136 * table 1-13. On dm816x, only EMAC, MDIO and SATA use this. See also TRM
|
| H A D | prm2xxx_3xxx.h | 183 * check TRM if you are unsure
219 * 2420 TRM sometimes uses "EN_WAKEUP" instead of "EN_WKUP"
|
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | arm,pl35x-smc.yaml | 17 The TRM is available here:
119 # According to TRM, really should be 3 clocks
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-gta04a5one.dts | 21 /* data lines, gpmc_d0..d7 not muxable according to TRM */
33 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
|
| H A D | am3517.dtsi | 34 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
182 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
|
| /linux/drivers/clk/ti/ |
| H A D | dpll44xx.c | 21 * defined in OMAP4430/60 Public TRM section 3.6.3.3.2 "Enable Control,
87 * Public TRM section 3.6.3.3.2 "Enable Control, Status, and Low-Power
|
| /linux/drivers/nvmem/ |
| H A D | vf610-ocotp.c | 122 /* Refer section OTP read/write timing parameters in TRM */ in vf610_ocotp_calculate_timing()
183 * 0xBADABADA as mentioned by the TRM. We just read this in vf610_ocotp_read()
|
| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-j721s2.dtsi | 5 * TRM (SPRUJ28 NOVEMBER 2021): https://www.ti.com/lit/pdf/spruj28
110 /* Recommendation from GIC500 TRM Table A.3 */
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| /linux/drivers/ufs/host/ |
| H A D | ufs-exynos.h | 39 * Note: GS101_DBG_OPTION offsets below differ from the TRM
40 * but match the downstream driver. Following the TRM
|
| /linux/drivers/pwm/ |
| H A D | pwm-omap-dmtimer.c | 92 * According to OMAP 4 TRM section 22.2.4.10 the counter should be in pwm_omap_dmtimer_start()
190 * OMAP4430/60/70 TRM sections 22.2.4.10 and 22.2.4.11 in pwm_omap_dmtimer_config()
191 * AM335x Sitara TRM sections 20.1.3.5 and 20.1.3.6 in pwm_omap_dmtimer_config()
|
| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | sdhci-am654.yaml | 173 ti,trm-icp:
240 ti,trm-icp = <0x8>;
|
| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | twl4030-audio.txt | 19 -ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the
|
| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | zynq-reset.txt | 5 See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.
|
| /linux/Documentation/hwmon/ |
| H A D | vexpress.rst | 17 * Section "4.4.14. System Configuration registers" of the V2M-P1 TRM:
|
| /linux/arch/arm/mm/ |
| H A D | proc-arm925.S | 20 * Some additional notes based on deciphering the TI TRM on OMAP-5910:
24 * at once. This is the default value. See TRM 2-20 and 2-24 for
30 * memory. See TRM 2-24 for more information.
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| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | arm,cmn.yaml | 40 discovery node (see TRM definition of ROOTNODEBASE). Not
|
| /linux/drivers/irqchip/ |
| H A D | irq-sg2042-msi.c | 29 * @reg_clr: clear reg, see TRM, 10.1.33, GP_INTR0_CLR
30 * @doorbell_addr: see TRM, 10.1.32, GP_INTR0_SET
|