/linux/Documentation/admin-guide/pm/ |
H A D | intel_idle.rst | 28 processor's functional blocks into low-power states. That instruction takes two 42 .. _intel-idle-enumeration-of-states: 44 Enumeration of Idle States 50 as C-states (in the ACPI terminology) or idle states. The list of meaningful 51 ``MWAIT`` hint values and idle states (i.e. low-power configurations of the 55 In order to create a list of available idle states required by the ``CPUIdle`` 56 subsystem (see :ref:`idle-states-representation` in 58 ``intel_idle`` can use two sources of information: static tables of idle states 69 states, ``intel_idle`` first looks for a ``_CST`` object under one of the ACPI 72 ``CPUIdle`` subsystem expects that the list of idle states supplied by the [all …]
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H A D | intel_pstate.rst | 27 information about that). For this reason, the representation of P-states used 32 ``intel_pstate`` maps its internal representation of P-states to frequencies too 69 hardware-managed P-states (HWP) support. If it works in this mode, the 89 depends on whether or not the hardware-managed P-states (HWP) feature has been 106 select P-states by itself, but still it can give hints to the processor's 130 Also, in this configuration the range of P-states available to the processor's 182 registers of the CPU. It generally selects P-states proportional to the 199 hardware-managed P-states (HWP) support. It is always used if the 223 the entire range of available P-states is exposed by ``intel_pstate`` to the 232 Turbo P-states Support [all …]
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H A D | strategies.rst | 15 One of them is based on using global low-power states of the whole system in 17 significantly reduced, referred to as :doc:`sleep states <sleep-states>`. The 18 kernel puts the system into one of these states when requested by user space 21 user space code can run. Because sleep states are global and the whole system 26 <working-state>`, is based on adjusting the power states of individual hardware 30 a metastate covering a range of different power states of the system in which 32 ``inactive`` (idle). If they are active, they have to be in power states 34 are inactive, ideally, they should be in low-power states in which they may not 43 for the same system in a sleep state. However, transitions from sleep states 47 sleep states than when they are runtime idle most of the time.
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H A D | cpuidle.rst | 19 Modern processors are generally able to enter states in which the execution of 21 memory or executed. Those states are the *idle* states of the processor. 23 Since part of the processor hardware is not used in idle states, entering them 28 the idle states of processors for this purpose. 56 except for one have been put into idle states at the "core level" and the 75 larger unit are in idle states already). 90 Tasks can be in various states. In particular, they are *runnable* if there are 104 code may cause the processor to be put into one of its idle states, if they are 106 idle states, or there is not enough time to spend in an idle state before the 108 available idle states from being used, the CPU will simply execute more or less [all …]
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/linux/drivers/cpuidle/ |
H A D | cpuidle-riscv-sbi.c | 34 u32 *states; member 81 u32 *states = __this_cpu_read(sbi_cpuidle_data.states); in sbi_cpuidle_enter_state() local 82 u32 state = states[idx]; in sbi_cpuidle_enter_state() 96 u32 *states = data->states; in __sbi_enter_domain_idle_state() local 116 state = states[idx]; in __sbi_enter_domain_idle_state() 222 * of a shared state for the domain, assumes the domain states are all in sbi_dt_cpu_init_topology() 223 * deeper states. in sbi_dt_cpu_init_topology() 225 drv->states[state_count - 1].flags |= CPUIDLE_FLAG_RCU_IDLE; in sbi_dt_cpu_init_topology() 226 drv->states[state_count - 1].enter = sbi_enter_domain_idle_state; in sbi_dt_cpu_init_topology() 227 drv->states[state_count - 1].enter_s2idle = in sbi_dt_cpu_init_topology() [all …]
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H A D | dt_idle_genpd.c | 26 struct genpd_power_state *states, int state_count) in pd_parse_state_nodes() argument 32 ret = parse_state(to_of_node(states[i].fwnode), &state); in pd_parse_state_nodes() 42 states[i].data = state_buf; in pd_parse_state_nodes() 50 kfree(states[i].data); in pd_parse_state_nodes() 56 struct genpd_power_state **states, in pd_parse_states() argument 61 /* Parse the domain idle states. */ in pd_parse_states() 62 ret = of_genpd_parse_idle_states(np, states, state_count); in pd_parse_states() 67 ret = pd_parse_state_nodes(parse_state, *states, *state_count); in pd_parse_states() 69 kfree(*states); in pd_parse_states() 74 static void pd_free_states(struct genpd_power_state *states, in pd_free_states() argument [all …]
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H A D | dt_idle_states.c | 3 * DT idle states parsing code. 9 #define pr_fmt(fmt) "DT idle-states: " fmt 62 * latencies as defined in idle states bindings in init_state_node() 127 * dt_init_idle_driver() - Parse the DT idle states and initialize the 128 * idle driver states array 142 * If DT idle states are detected and are valid the state count and states 146 * Return: number of valid DT idle states parsed, <0 on failure 162 * We get the idle states for the first logical cpu in the in dt_init_idle_driver() 194 pr_warn("State index reached static CPU idle driver states array size\n"); in dt_init_idle_driver() 198 idle_state = &drv->states[state_idx++]; in dt_init_idle_driver() [all …]
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H A D | cpuidle-psci.c | 58 u32 *states = data->psci_states; in __psci_enter_domain_idle_state() local 75 state = states[idx]; in __psci_enter_domain_idle_state() 238 * of a shared state for the domain, assumes the domain states are all in psci_dt_cpu_init_topology() 239 * deeper states. On PREEMPT_RT the hierarchical topology is limited to in psci_dt_cpu_init_topology() 242 drv->states[state_count - 1].enter_s2idle = psci_enter_s2idle_domain_idle_state; in psci_dt_cpu_init_topology() 244 drv->states[state_count - 1].enter = psci_enter_domain_idle_state; in psci_dt_cpu_init_topology() 288 /* Idle states parsed correctly, store them in the per-cpu struct. */ in psci_dt_cpu_init_idle() 301 * idle states must not be enabled, so bail out in psci_cpu_init_idle() 358 * PSCI idle states relies on architectural WFI to be represented as in psci_idle_init_cpu() 361 drv->states[0].enter = psci_enter_idle_state; in psci_idle_init_cpu() [all …]
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H A D | Kconfig.arm | 12 It provides a generic idle driver whose idle states are configured 25 managing idle states through the PSCI firmware interface. 28 - If the idle states are described with the non-hierarchical layout, 29 all idle states are still available. 31 - If the idle states are described with the hierarchical layout, 32 only the idle states defined per CPU are available, but not the ones 33 being shared among a group of CPUs (aka cluster idle states). 44 idle states. 56 define different C-states for little and big cores through the
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H A D | cpuidle-mvebu-v7.c | 36 if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE) in mvebu_v7_enter_idle() 53 .states[0] = ARM_CPUIDLE_WFI_STATE, 54 .states[1] = { 63 .states[2] = { 77 .states[0] = ARM_CPUIDLE_WFI_STATE, 78 .states[1] = { 92 .states[0] = ARM_CPUIDLE_WFI_STATE, 93 .states[1] = {
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/linux/Documentation/devicetree/bindings/cpu/ |
H A D | idle-states.yaml | 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml# 7 title: Idle states 19 dynamically, where cores can be put in different low-power states (ranging 20 from simple wfi to power gating) according to OS PM policies. The CPU states 21 representing the range of dynamic idle states that a processor can enter at 23 parameters required to enter/exit specific idle states on a given processor. 26 2 - ARM idle states 30 power states an ARM CPU can be put into are identified by the following list: 38 The power states described in the SBSA document define the basic CPU states on 40 PM implementation to put the processor in different idle states (which include [all …]
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/linux/drivers/regulator/ |
H A D | gpio-regulator.c | 39 struct gpio_regulator_state *states; member 51 if (data->states[ptr].gpios == data->state) in gpio_regulator_get_value() 52 return data->states[ptr].value; in gpio_regulator_get_value() 65 if (data->states[ptr].value < best_val && in gpio_regulator_set_voltage() 66 data->states[ptr].value >= min_uV && in gpio_regulator_set_voltage() 67 data->states[ptr].value <= max_uV) { in gpio_regulator_set_voltage() 68 target = data->states[ptr].gpios; in gpio_regulator_set_voltage() 69 best_val = data->states[ptr].value; in gpio_regulator_set_voltage() 94 return data->states[selector].value; in gpio_regulator_list_voltage() 104 if (data->states[ptr].value > best_val && in gpio_regulator_set_current_limit() [all …]
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/linux/tools/power/cpupower/man/ |
H A D | cpupower-idle-set.1 | 12 sleep states. This can be handy for power vs performance tuning. 23 Disable all idle states with a equal or higher latency than <LATENCY>. 25 Enable all idle states with a latency lower than <LATENCY>. 28 Enable all idle states if not enabled already. 32 Cpuidle Governors Policy on Disabling Sleep States 36 how to choose sleep states, subsequent sleep states on this core, might get 46 then all deeper states are disabled as well. Likewise, if one enables a 53 If criteria are not met to enter deeper sleep states and the lightest sleep 63 By default processor sleep states of all CPU cores are set. Please refer 65 C-states of specific cores.
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/linux/Documentation/devicetree/bindings/powerpc/opal/ |
H A D | power-mgt.txt | 5 idle states. The description of these idle states is exposed via the 14 - flags: indicating some aspects of this idle states such as the 16 idle states and so on. The flag bits are as follows: 27 The following properties provide details about the idle states. These 32 If idle-states are defined, then the properties 38 Array of strings containing the names of the idle states. 42 flags associated with the aforementioned idle-states. The 62 exit-latencies (in ns) for the idle states in 67 target-residency (in ns) for the idle states in 75 PSSCR for each of the idle states in ibm,cpu-idle-state-names. [all …]
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-devices-power | 15 from sleep states, such as the memory sleep state (suspend to 33 be enabled to wake up the system from sleep states. 87 the system from sleep states, this attribute is not present. 89 states, this attribute is empty. 99 system from sleep states, this attribute is not present. If 101 states, this attribute is empty. 111 is not capable to wake up the system from sleep states, this 113 up the system from sleep states, this attribute is empty. 123 from sleep states, this attribute is not present. If the 124 device is not enabled to wake up the system from sleep states, [all …]
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H A D | sysfs-bus-surface_aggregator-tabletsw | 8 Currently returned posture states are: 29 New states may be introduced with new hardware. Users therefore 30 must not rely on this list of states being exhaustive and 31 gracefully handle unknown states. 39 returned posture states are: 55 New states may be introduced with new hardware. Users therefore 56 must not rely on this list of states being exhaustive and 57 gracefully handle unknown states.
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/linux/sound/usb/misc/ |
H A D | ua101.c | 65 /* bits in struct ua101::states */ 90 unsigned long states; member 158 if (test_and_clear_bit(USB_CAPTURE_RUNNING, &ua->states)) { in abort_usb_capture() 166 if (test_and_clear_bit(USB_PLAYBACK_RUNNING, &ua->states)) in abort_usb_playback() 185 if (test_bit(USB_PLAYBACK_RUNNING, &ua->states)) { in playback_urb_complete() 205 set_bit(PLAYBACK_URB_COMPLETED, &ua->states); in first_playback_urb_complete() 258 if (unlikely(!test_bit(USB_PLAYBACK_RUNNING, &ua->states))) in playback_work() 288 if (test_bit(ALSA_PLAYBACK_RUNNING, &ua->states)) in playback_work() 369 if (frames > 0 && test_bit(ALSA_CAPTURE_RUNNING, &ua->states)) in capture_urb_complete() 374 if (test_bit(USB_CAPTURE_RUNNING, &ua->states)) { in capture_urb_complete() [all …]
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/linux/tools/verification/dot2/ |
H A D | automata.py | 26 self.states, self.initial_state, self.final_states = self.__get_state_variables() 81 states = [] 97 states.append(state) 108 states = sorted(set(states)) 109 states.remove(initial_state) 111 # Insert the initial state at the bein og the states 112 states.insert(0, initial_state) 117 return states, initial_state, final_states 146 states = self.states 155 for state in states: [all …]
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/linux/drivers/cpuidle/governors/ |
H A D | ladder.c | 40 struct ladder_device_state states[CPUIDLE_STATE_MAX]; member 56 ldev->states[old_idx].stats.promotion_count = 0; in ladder_do_selection() 57 ldev->states[old_idx].stats.demotion_count = 0; in ladder_do_selection() 73 int first_idx = drv->states[0].flags & CPUIDLE_FLAG_POLLING ? 1 : 0; in ladder_select_state() 83 last_state = &ldev->states[last_idx]; in ladder_select_state() 85 last_residency = dev->last_residency_ns - drv->states[last_idx].exit_latency_ns; in ladder_select_state() 91 drv->states[last_idx + 1].exit_latency_ns <= latency_req) { in ladder_select_state() 103 drv->states[last_idx].exit_latency_ns > latency_req)) { in ladder_select_state() 107 if (drv->states[i].exit_latency_ns <= latency_req) in ladder_select_state() 137 int first_idx = drv->states[0].flags & CPUIDLE_FLAG_POLLING ? 1 : 0; in ladder_enable_device() [all …]
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H A D | teo.c | 37 * idle states provided by the %CPUIdle driver in the ascending order. That is, 70 * - The sum of the "hits" metric for all of the idle states shallower than 74 * - The sum of the "intercepts" metric for all of the idle states shallower 82 * - Traverse the enabled idle states shallower than the candidate one in the 86 * of the idle states between it and the candidate one (including the 172 u64 lat_ns = drv->states[dev->last_state_idx].exit_latency_ns; in teo_update() 202 target_residency_ns = drv->states[i].target_residency_ns; in teo_update() 233 drv->states[i].target_residency_ns >= TICK_NSEC; in teo_state_ok() 242 * @no_poll: Don't consider polling states. 252 (no_poll && drv->states[i].flags & CPUIDLE_FLAG_POLLING)) in teo_find_shallower_state() [all …]
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/linux/Documentation/devicetree/bindings/mux/ |
H A D | mux-consumer.yaml | 29 be set to, the property "mux-states" must be used. An optional property 31 each of the multiplixer states listed in the "mux-states" property. 33 Properties "mux-controls" and "mux-states" can be used depending on how 35 needs to set multiple states in a mux controller, then property 37 controller to a given state then property "mux-states" can be used. 49 mux-states: 62 controller to an index into the list given by the "mux-states"
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/linux/Documentation/driver-api/pm/ |
H A D | cpuidle.rst | 25 However, there may be multiple different idle states that can be used in such a 35 units: *governors* responsible for selecting idle states to ask the processor 85 struct cpuidle_state objects representing idle states that the 117 The list of idle states to take into consideration is represented by the 118 :c:member:`states` array of struct cpuidle_state objects held by the 149 account when selecting idle states. In order to obtain the current effective 164 First of all, a ``CPUIdle`` driver has to populate the :c:member:`states` array 167 idle states that the processor hardware can be asked to enter shared by all of 170 The entries in the :c:member:`states` array are expected to be sorted by the 214 :c:member:`states` array representing the idle state to ask the processor to [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | power-domain.yaml | 31 domain-idle-states: 36 Phandles of idle states that defines the available states for the 40 Note that, the domain-idle-state property reflects the idle states of this 41 PM domain and not the idle states of the devices or sub-domains in the PM 42 domain. Devices and sub-domains have their own idle states independent of 43 the parent domain's idle states. In the absence of this property, the 110 domain-idle-states = <&DOMAIN_RET>, <&DOMAIN_PWR_DN>; 118 domain-idle-states = <&DOMAIN_PWR_DN>; 121 domain-idle-states {
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/linux/Documentation/admin-guide/blockdev/drbd/ |
H A D | figures.rst | 20 .. kernel-figure:: conn-states-8.dot 21 :alt: conn-states-8.dot 24 .. kernel-figure:: disk-states-8.dot 25 :alt: disk-states-8.dot 28 .. kernel-figure:: peer-states-8.dot 29 :alt: peer-states-8.dot
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | psci.yaml | 98 [1] Kernel documentation - ARM idle states bindings 99 Documentation/devicetree/bindings/cpu/idle-states.yaml 111 own specific power states and can be better represented hierarchically. 113 For these cases, the definitions of the idle states for the CPUs and the 114 CPU topology, must conform to the binding in [3]. The idle states 188 // Case 4: CPUs and CPU idle states described using the hierarchical model. 212 idle-states { 223 domain-idle-states { 249 domain-idle-states = <&CPU_PWRDN>; 255 domain-idle-states = <&CPU_PWRDN>; [all …]
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