Lines Matching full:states
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
7 title: Idle states
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
21 representing the range of dynamic idle states that a processor can enter at
23 parameters required to enter/exit specific idle states on a given processor.
26 2 - ARM idle states
30 power states an ARM CPU can be put into are identified by the following list:
38 The power states described in the SBSA document define the basic CPU states on
40 PM implementation to put the processor in different idle states (which include
41 states listed above; "off" state is not an idle state since it does not have
48 The device tree binding definition for ARM idle states is the subject of this
52 3 - RISC-V idle states
56 suspend (or idle) states (ranging from simple WFI, power gating, etc). The
60 The platform specific suspend (or idle) states of a hart can be either
67 4 - idle-states definitions
70 Idle states are characterized for a specific system through a set of
72 triggered upon idle states entry and exit.
183 states energy consumptions plots.
185 For sake of simplicity, let's consider a system with two idle states IDLE1,
211 Graph 2: idle states min-residency example
213 In graph 2 above, that takes into account idle states entry/exit energy
226 shallower states in a system with multiple idle states) is defined
228 IDLE1 and IDLE2 states breaks even.
230 The definitions provided in this section underpin the idle states
234 5 - idle-states node
237 The processor idle states are defined within the idle-states node, which is
239 processor idle states, defined as device tree nodes, are listed.
241 On ARM systems, it is a container of processor idle states nodes. If the
243 just supports idle_standby, an idle-states node is not required.
246 6 - Qualcomm specific STATES
249 Idle states have different enter/exit latency and residency values.
250 The idle states supported by the QCOM SoC are defined as -
262 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
329 const: idle-states
356 idle-states node. Please refer to the entry-method bindings
378 (i.e. idle states node with entry-method property is set to "psci")
452 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
461 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
470 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
479 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
488 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
497 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
506 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
515 cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
524 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
533 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
542 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
551 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
560 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
569 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
578 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
587 cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
591 idle-states {
682 cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
689 cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
696 cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
703 cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
710 cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
717 cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
724 cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
731 cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
734 idle-states {
786 cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>,
802 cpu-idle-states = <&CPU_RET_0_0>, <&CPU_NONRET_0_0>,
818 cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>,
834 cpu-idle-states = <&CPU_RET_1_0>, <&CPU_NONRET_1_0>,
844 idle-states {
920 idle-states {