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/linux/drivers/scsi/isci/
H A Dprobe_roms.h228 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
234 * NOTE: Max spread for SATA is +0 / -5000 PPM.
237 * SATA SSC Tx at +0 / -1419 PPM Spread = 0x2
238 * SATA SSC Tx at +0 / -2129 PPM Spread = 0x3
239 * SATA SSC Tx at +0 / -4257 PPM Spread = 0x6
240 * SATA SSC Tx at +0 / -4967 PPM Spread = 0x7
246 * NOTE: Max spread for SAS down-spreading +0 /
249 * SAS SSC Tx at +0 / -1419 PPM Spread = 0x2
250 * SAS SSC Tx at +0 / -2129 PPM Spread = 0x3
252 * NOTE: Max spread for SAS center-spreading +2300 /
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/linux/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt43 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
45 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
59 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
61 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
63 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
/linux/Documentation/devicetree/bindings/clock/
H A Dti,cdce925.yaml57 optional child node can be used to specify spread
63 spread-spectrum:
67 spread-spectrum-center:
99 spread-spectrum = <4>;
100 spread-spectrum-center;
H A Dmediatek,mt8186-fhctl.yaml7 title: MediaTek frequency hopping and spread spectrum clocking control
15 Spread spectrum clocking (SSC) is another function provided by this hardware.
35 description: The percentage of spread spectrum clocking for one PLL.
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-dptf134 (RO) Presents SSC (spread spectrum clock) information for EMI
140 [7:0] Sets clock spectrum spread percentage:
142 1 LSB = 0.1% increase in spread (for
144 1 LSB = 0.2% increase in spread (for
146 [8] When set to 1, enables spread
153 (Spread spectrum clock) range
155 to spread waveform
/linux/Documentation/devicetree/bindings/regulator/
H A Dnvidia,tegra-regulators-coupling.txt40 regulator-coupled-max-spread = <170000 550000>;
50 regulator-coupled-max-spread = <170000 550000>;
60 regulator-coupled-max-spread = <550000 550000>;
/linux/drivers/clk/
H A Dclk-eyeq.c67 /* Spread amplitude (% = 0.1 * SPREAD[4:0]) */
70 /* Down-spread or center-spread */
168 unsigned long spread; in eqc_pll_parse_registers() local
198 * Spread spectrum. in eqc_pll_parse_registers()
200 * Spread is in 1/1024 parts of frequency. Clock accuracy in eqc_pll_parse_registers()
201 * is half the spread value expressed in parts per billion. in eqc_pll_parse_registers()
203 * accuracy = (spread * 1e9) / (1024 * 2) in eqc_pll_parse_registers()
207 spread = FIELD_GET(PCSR1_SPREAD, r1); in eqc_pll_parse_registers()
208 *acc = DIV_ROUND_CLOSEST(spread * 1000000000, 1024 * 2); in eqc_pll_parse_registers()
213 * spread lower. in eqc_pll_parse_registers()
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/linux/Documentation/misc-devices/
H A Dics932s401.rst25 frequency. If spread spectrum mode is enabled, the driver also reports by what
26 percent the clock signal is being spread, which should be between 0 and -0.5%.
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h65 * Display Port HW De spread of Reference Clock related Parameters structure
70 /* Flag for HW De Spread enabled (if enabled SS on DP Reference Clock)*/
96 /*> de-spread info, relevant only for on-the-fly tune-up pixel rate*/
/linux/lib/zstd/common/
H A Dfse_decompress.c64 BYTE* spread = (BYTE*)(symbolNext + maxSymbolValue + 1); in FSE_buildDTable_internal() local
92 /* Spread symbols */ in FSE_buildDTable_internal()
109 MEM_write64(spread + pos, sv); in FSE_buildDTable_internal()
111 MEM_write64(spread + pos + i, sv); in FSE_buildDTable_internal()
115 /* Now we spread those positions across the table. in FSE_buildDTable_internal()
130 tableDecode[uPosition].symbol = spread[s + u]; in FSE_buildDTable_internal()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-evb2-v10.dts312 regulator-coupled-max-spread = <10000>;
366 regulator-coupled-max-spread = <10000>;
616 regulator-coupled-max-spread = <10000>;
630 regulator-coupled-max-spread = <10000>;
644 regulator-coupled-max-spread = <10000>;
670 regulator-coupled-max-spread = <10000>;
685 regulator-coupled-max-spread = <10000>;
711 regulator-coupled-max-spread = <10000>;
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_sienna_cichlid.h906 // SECTION: Clock Spread Spectrum
908 // GFXCLK PLL Spread Spectrum
913 // GFXCLK DFLL Spread Spectrum
918 // UCLK Spread Spectrum
922 // FCLK Spread Spectrum
949 // UCLK Spread Spectrum
1267 // SECTION: Clock Spread Spectrum
1269 // GFXCLK PLL Spread Spectrum
1274 // GFXCLK DFLL Spread Spectrum
1279 // UCLK Spread Spectrum
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/linux/Documentation/devicetree/bindings/ata/
H A Dimx-sata.yaml60 fsl,no-spread-spectrum:
62 description: if present, disable spread-spectrum clocking on the SATA link.
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Ddfp.c214 * It toggles spread spectrum PLL output and sets the bindings of PLLs in nv04_dfp_prepare_sel_clk()
223 * bit 0 NVClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
224 * bit 2 MemClk spread spectrum on/off in nv04_dfp_prepare_sel_clk()
225 * bit 4 PixClk1 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
226 * bit 6 PixClk2 spread spectrum on/off toggle in nv04_dfp_prepare_sel_clk()
231 * maybe a different spread mode in nv04_dfp_prepare_sel_clk()
233 * The logic behind turning spread spectrum on/off in the first place, in nv04_dfp_prepare_sel_clk()
/linux/Documentation/admin-guide/cgroup-v1/
H A Dcpusets.rst25 1.6 What is memory spread ?
181 - cpuset.memory_spread_page flag: if set, spread page cache evenly on allowed nodes
319 1.6 What is memory spread ?
327 the kernel will spread the file system buffers (page cache) evenly
332 then the kernel will spread some file system related slab caches,
345 When new cpusets are created, they inherit the memory spread settings
349 or slab caches to ignore the task's NUMA mempolicy and be spread
352 their containing task's memory spread settings. If memory spreading
383 to access large file system data sets that need to be spread across
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-ti-pmic.dtsi57 regulator-coupled-max-spread = <300000>;
134 regulator-coupled-max-spread = <300000>;
H A Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi70 regulator-coupled-max-spread = <300000>;
83 regulator-coupled-max-spread = <300000>;
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c48 * dce121_clock_patch_xgmi_ss_info() - Save XGMI spread spectrum info
51 * Reads from VBIOS the XGMI spread spectrum info and saves it within
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8390-grinn-genio-som.dtsi87 regulator-coupled-max-spread = <6250>;
111 regulator-coupled-max-spread = <6250>;
/linux/drivers/gpu/drm/amd/display/include/
H A Dddc_service_types.h104 /* support for Spread Spectrum(SS) */
106 /* DP link settings (laneCount, linkRate, Spread) */
/linux/drivers/phy/starfive/
H A Dphy-jh7110-pcie.c65 /* Configuare spread-spectrum mode: down-spread-spectrum */ in phy_usb3_mode_set()
/linux/lib/
H A Dgroup_cpus.c269 /* Spread allocated groups on CPUs of the current node */ in assign_cpus_to_groups()
422 * number of groups we just spread the groups across the nodes. in __group_cpus_evenly()
517 * spread can observe consistent 'cpu_present_mask' without holding in group_cpus_evenly()
524 * from API user viewpoint since 2-stage spread is sort of in group_cpus_evenly()
/linux/Documentation/admin-guide/device-mapper/
H A Dswitch.rst22 is created it is spread across multiple members. The details of the
44 spread with an address region size on the order of 10s of MBs, which
/linux/lib/zstd/compress/
H A Dfse_compress.c116 /* Spread symbols */ in FSE_buildCTable_wksp()
121 …BYTE* const spread = tableSymbol + tableSize; /* size = tableSize + 8 (may write beyond tableSize)… in FSE_buildCTable_wksp() local
129 MEM_write64(spread + pos, sv); in FSE_buildCTable_wksp()
131 MEM_write64(spread + pos + i, sv); in FSE_buildCTable_wksp()
137 /* Spread symbols across the table. Lack of lowprob symbols means that in FSE_buildCTable_wksp()
149 tableSymbol[uPosition] = spread[s + u]; in FSE_buildCTable_wksp()
/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser.c1011 * Get spread spectrum information from the ASIC_InternalSS_Info(ver 2.1 or
1015 * no planning of supporting multiple spread Sprectum entry for EverGreen
1085 * Get spread sprectrum information from the ASIC_InternalSS_Info Ver 2.1 or
1091 * @id: spread sprectrum info index
1112 * Get spread sprectrum information from the ASIC_InternalSS_Info table Ver 2.1
1117 * @id: spread sprectrum info index
1181 * Get spread sprectrum information from the SS_Info table from the VBIOS
1187 * @id: spread sprectrum id
1776 * Get Number of spread spectrum entry from the SS_Info table from the VBIOS.
1779 * @id: spread spectrum id
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